教師資料

范慶麟 Ching-Lin Fan
職稱
教授
學歷
國立交通大學電子博士
電子郵件
clfan@mail.ntust.edu.tw
辦公室
EE 408-2

Office Hours 星期一下午1:30~3:00 星期五下午12:00~13:30
電話 886-2-27376374
傳真 886-2-27376424
個人網頁 http://www.et.ntust.edu.tw/people/detail/c-10.htm
實驗室 平面顯示元件實驗室 T3-402 (分機:6834)
研究領域 1.AMOLED畫素電路設計 2.有機薄膜電晶體(OTFT) 3.IGZO TFT 4.可彎曲面板驅動電晶體開發 5.半導體元件製程
開授課程 物理、半導體元件製造工程、TFT-LCD工程技術

2011.02  ~  迄今 國立台灣科技大學 電子系暨光電所教授
2006.08 ~  2011.01 國立台灣科技大學 電子系暨光電所副教授
2004.08  ~  2006.07 國立台灣科技大學 電子系助理教授
2003.02  ~  2004.07 國立虎尾科技大學 光電與材料科技所助理教授
2001.09 ~  2003.02 錸寶科技股份有限公司 設計處主任工程師
2000.04 ~  2000.06 日本Sharp公司 產品開發處 技術移轉面板設計 面板設計工程師
1999.10 ~  2000.09 廣輝電子股份有限公司 面板設計部面板設計工程師



研究成果
  [1]   Ching-Lin Fan, Yi-Chiung Chen, Chuang-Cheng Yang, Yung-Kun Tsai and Bohr-Ran Huang,"Novel LTPS-TFT Pixel Circuit with OLED Luminance Compensation for 3D AMOLED Displays," Journal of Display Technology 2016, vol. 12, pp. 425.(impact factor:2.241 )
  [2]   Ching-Lin Fan, Ming-Chi Shang, Mao-Yuan Hsia, Shea-Jue Wang, Bohr-Ran Huang and Win-Der Lee,"Poly(4-vinylphenol) gate insulator with cross-linking using a rapid low-power microwave induction heating scheme for organic thin-film-transistors," APL Mater. 2016, vol. 4, pp. 036105.(impact factor:2.789 )
  [3]   Ching-Lin Fan, Wei-Chun Lin, Hsiang-Sheng Chang, Yu-Zuo Lin and Bohr-Ran Huang,"Effects of the F4TCNQ-Doped Pentacene Interlayers on Performance Improvement of Top-Contact Pentacene-Based Organic Thin-Film Transistors," Materials 2016, vol. 9, pp. 46.(impact factor: 2.651)
  [4]   Ching-Lin Fan, Wei-Chun Lin, Cheng-Chieh Lee, Yu-Zuo Lin, and Bohr-Ran Huang, "Fabrication of top-contact pentacene-based organic thin-film transistors with short channels using two-step SU8/poly(vinyl alcohol) lift-off photolithography process," Japanese Journal of Applied Physics, 2015, vol. 55, no. 2, pp.026502.(impact factor: 1.127)
  [5]   Ching-Lin Fan, Fan-Ping Tseng, Bo-Jyun Li, Yu-Zuo Lin, Shea-Jue Wang, WinDer Lee, and Bohr-Ran Huang, "Improvement in reliability of amorphous indium–gallium–zinc oxide thin-film transistors with Teflon/SiO2 bilayer passivation under gate bias stress," Japanese Journal of Applied Physics, 2015, vol. 55, no. 2, pp. 02BC17. (impact factor: 1.127)
  [6]   Ching-Lin Fan, Ming-Chi Shang, Bo-Jyun Li, Yu-Zuo Lin, Shea-Jue Wang, Win-Der Lee and Bohr-Ran Hung, "Teflon/SiO2 Bilayer Passivation for Improving the Electrical Reliability of Oxide TFTs Fabricated Using a New Two-Photomask Self-Alignment Process," Materials 2015, vol. 8, no. 4, pp. 1704-1713. (impact factor:2.651)
  [7]   Ching-Lin Fan, Wei-Chun Lin, Han-Hsing Peng, Yu-Zuo Lin, and Bohr-Ran Huang, "Correlation between ambient air and continuous bending stress for the electrical reliability of flexible pentacene-based thin-film transistors," Japanese Journal of Applied Physics, 2014, vol. 54, pp.011602.(impact factor: 1.127)
  [8]   Ching-Lin Fan, Ming-Chi Shang, Bo-Jyun Li, Yu-Zuo Lin, Shea-Jue Wang, and Win-Der Lee, "A Self-Aligned a-IGZO Thin-Film Transistor Using a New Two-Photo-Mask Process with a Continuous Etching Scheme," Materials, 2014, vol. 7, no. 8, pp.5761-5768. (impact factor: 2.651)
  [9]   Ching-Lin Fan, Hao-Wei Chen, Hui-Lung Lai, Bo-Liang Guo, and Bohr-Ran Huang, "Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-Film Transistor and the Organic Light-Emitting Diode for Active-Matrix Organic Light-Emitting Diode Displays," International Journal of Photoenergy, 2014, pp.604286. (impact factor: 1.563)
  [10]   Ching-Lin Fan, Yu-Zuo Lin, Yi-Yan Lin, and Sui-Chih Chen,"High Performance Submicrometer Pentacene-Based Organic Thin-Film Transitor Using Planar Bottom-Contact Structure," Organic Electronics, 2013, vol. 14, no. 12, pp.3147-3151.(impact factor: 3.827)
  [11]   Ching-Lin Fan, Yu-Zuo Lin, Ping-Cheng Chiu, Shea-Jue Wang, and Win-Der Lee,"Teflon/SiO2 bilayer passivation for improving the electrical reliability of pentacene-based organic thin-film transistors," Organic Electronics, 2013, vol. 14, no. 9, pp. 2228-2232.(impact factor: 3.827)
  [12]   Ching-Lin Fan, Fan-Ping Tseng, Hui-Lung Lai, Bo-Jhang Sun, Kuang-Chi Chao, and Yi-Chiung Chen,"A Novel LTPS-TFT Pixel Circuit to Compensate the Electronic Degradation for Active-Matrix Organic LightEmitting Diode Displays," International Journal of Photoenergy, 2013, pp.839301. (impact factor: 1.563)
  [13]   Ching-Lin Fan, Yi-Yan Lin, Shou-Kuan Wang, Min-Chi Shang, and Wei-Chun Lin, “Performance Improvement of Low-Temperature Polycrystalline Silicon Thin-Film Transistors with Fluorinated Silicate Glass Drive-In Masking Layer,” Jpn. J. Appl. Phys., vol. 51, no. 10, p. 106502, 2012.
  [14]   Ching-Lin Fan, Yi-Yan Lin, and Yan-Hang Yang,"Performance Improvement with a Combined Scheme of Rapid Thermal Annealing and Multi-channel Structure for Poly-Si TFTs with Various Device Dimensions," Journal of the Korean Physical Society, vol. 61, no. 8, pp. 1308-1313, 2012.
  [15]   Ching-Lin Fan, Yu-Zuo Lin, Win-Der Lee, Shea-Jue Wang, and Chao-Hung Huang, “Improved Pentacene Growth Continuity for Enhancing the Performance of Pentacene-Based Organic Thin-Film Transistors,” Org. Electron., vol. 13, no. 12, pp. 2924-2928, 2012.
  [16]   Ching-Lin Fan, Yi-Yan Lin, and Chun-Chieh Yang, “Improvement in Performance and Reliability with CF4 Plasma Pretreatment on the Buffer Oxide Layer for Low-Temperature Polysilicon Thin-Film Transistor,” Semicond. Sci. Technol., vol. 27, no. 3, p. 035005, 2012.
  [17]   Ching-Lin Fan, Tsung-Hsien Yang, and Ping-Cheng Chiu, “Effect of Inserting Teflon as a Surface Modification Layer on Bottom-Contact Pentacene-Based Organic Thin-Film Transistors,” Jpn. J. Appl. Phys., vol. 51, no. 1, p. 016503, 2012.
  [18]   Ching-Lin Fan, Yi-Yan Lin, and Shou-Kuan Wang, “Hollow-Cathode CVD N2 Plasma Treatment for Performance and Reliability Improvement of LTPS-TFTs,” IEEE Electron Device Lett., vol. 33, no. 3, pp. 387-389, 2012.
  [19]   Ching-Lin Fan, Min-Chi Shang, Wei-Chun Lin, Hsiu-Chen Chang, Kuang-Chi Chao, and Bo-Liang Guo, “LTPS-TFT Pixel Circuit Compensating for TFT Threshold Voltage Shift and IR-Drop on the Power Line for AMOLED Displays,” Adv. Mater. Sci. Eng., vol. 2012, no. 270865, p. 1, 2012.
  [20]   Ching-Lin Fan, Yu-Zuo Lin, Cheng-Han Huang, “Combined Scheme of UV/Ozone and HMDS Treatment on Gate Insulator for Performance Improvement of Low-Temperature-Processed Bottom-Contact OTFT, Semicond. Sci. Technol., vol. 26, no. 4, p. 045006, 2011.
  [21]   Ching-Lin Fan, Yi-Yan Lin, and Shou-Kuan Wang, “Improvement in Characteristics of Low-Temperature Polycrystalline Silicon Thin Film Transistors with High-Efficiency and Low-Damage N2 Plasma Pretreatment,” Jpn. J. Appl. Phys., vol. 50, no. 10, p. 10PC02, 2011.
  [22]   Ching-Lin Fan, Ping-Cheng Chiu, Yu-Zuo Lin, Tsung-Hsien Yang, and Chin-Yuan Chiang, “Investigation on the electrical characteristics of a pentacene thin-film transistor and its reliability under positive drain bias stress,” Semicond. Sci. Technol., vol. 26, no. 12, p. 125007, 2011.
  [23]   Ching-Lin Fan and Ping-Cheng Chiu, “Performance Improvement of Top-Contact Pentacene-Based Organic Thin-Film Transistors by Inserting an Ultrathin Teflon Carrier Injection Layer,” Jpn. J. Appl. Phys., vol. 50, no. 10, p. 100203, 2011.
  [24]   Ching-Lin Fan, Hui-Lung Lai, and Yan-Wei Liu, “An AMOLED AC-biased Pixel Design Compensating the Threshold Voltage and I-R Drop,” Int. J. Photoenergy, vol. 2011, no. 543273, p. 1, 2011.
  [25]   Ching-Lin Fan, Hui-Lung Lai, Tzu-Chien Huang, and Wen-Fa Wu, “High-Performance N2O Plasma Treated Multiwall Carbon Nanotubes Grown by Thermal Chemical Vapor Deposition,” ECS Transactions, vol. 35, no. 25, p. 63, 2011.
  [26]   Ching-Lin Fan, Yi-Yan Lin, Yan-Hang Yang and Hung-Che Chen, “Effects of Rapid Thermal Annealing on Poly-Si TFT with Different Gate Oxide Thickness,” IEICE Transactions on Electronics, vol. E93-C, no. 1, pp. 151-153, 2010.
  [27]   C. L. Fan, Y. Y. Lin, B. S. Lin, J. Y. Chang and H. C. Chang, “New Pixel Circuit Compensating LTPS Poly-Si TFT Threshold-Voltage Shift for driving AMOLED”, J. Korean Phys. Soc., vol. 56, no. 4, pp. 1185-1189, 2010.
  [28]   Ching-Lin Fan, Hui-Lung Lai, Jyu-Yu Chang, “Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-film Transistor and the Organic Light-Emitting Diode for Active-Matrix Organic Light-Emitting Diode Displays,” Jpn. J. Appl. Phys., vol. 49, no. 5, p. 05EB04, 2010.
  [29]   Ching-Lin Fan, Yu-Sheng Lin, and Yan-Wei Liu, “Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuits for Active Matrix Organic Light Emitting Diodes,” IEICE Transactions on Electronics, vol. E93-C, no. 5, pp. 712-714, 2010.
  [30]   Ching-Lin Fan, Ping-Cheng Chiu, and Chang-Chih Lin, “Low-Temperature- Deposited SiO2 Gate Insulator With Hydrophobic Methyl Groups for Bottom-Contact Organic Thin-Film Transistors,” IEEE Electron Device Lett., vol. 31, no. 12, pp. 1485-1487, 2010.
  [31]   Ching-Lin Fan, Yi-Yan Lin, Jyu-Yu Chang, Bo-Jhang Sun, and Yan-Wei Liu, “A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode,” Jpn. J. Appl. Phys., vol. 49, no. 6, p. 064201, 2010.
  [32]   Ching-Lin Fan, Ping-Cheng Chiu, Yan-Hang Yang, and Chang-Chih Lin, “Low Temperature Processed (< 100 ℃) Organic Thin-Film Transistor Using Hollow-Cathode CVD SiO2 as the Gate Insulator,” Semicond. Sci. Technol., vol. 25, no. 7, p. 075006, 2010.
  [33]   Ching-Lin Fan, Tsung-Hsien Yang, and Chin-Yuan Chiang, “Performance Degradation of Pentacene-Based Organic Thin-Film Transistors Under Positive Drain Bias Stress in the Atmosphere,” IEEE Electron Device Lett., vol. 31, no. 8, pp. 887-889, 2010.
  [34]   Ching-Lin Fan, Tsung-Hsien Yang, and Ping-Cheng Chiu, “Performance Improvement of Bottom-Contact Pentacene-Based Organic Thin-Film Transistors by Inserting a Thin Polytetrafluoroethylene Buffer Layer,” Appl. Phys. Lett., vol. 97, no. 14, p. 143306, 2010.
  [35]   Ching-Lin Fan, Tsung-Hsien Yang, Ping-Cheng Chiu, Cheng-Han Huang, and Chin-Yuan Chiang, “Organic Thin-Film Transistor Performance Improvement Using Ammonia (NH3) Plasma Treatment on the Gate Insulator Surface,” Solid-State Electronics, vol. 53, no. 2, pp. 246-250, 2009.
  [36]   Ching-Lin Fan, Tsung-Hsien Yang, Chang-Chih Lin, and Cheng-Han Huang, “N2O-Plasma Effect on the Low-Temperature deposited Gate Dielectric for Organic Thin-Film Transistors,” Electronics Lett., vol. 44, no. 19, pp. 1158-1160, 2008.
  [37]   Ching-Lin Fan, Tsung-Hsien Yang, and Cheng-I Lin, “Low-Temperature-Processed Poly-Si Thin-Film-Transistors With Stable Solid-State Continuous-Wave Laser Crystallization,” Jpn. J. Appl. Phys., vol. 45, no. 36, pp. L973-L976, 2006.
  [38]   Ching-Lin Fan and Tsung-Hsien Yang, “Effects of NH3 Plasma Pretreatment before Crystallization on Low-Temperature-Processed Poly-Si Thin-Film Transistors,” J. Electrochem. Soc., vol. 153, no. 8, pp. H161-H165, 2006.
  [39]   Ching-Lin Fan and Tsung-Hsien Yang, “Effects of Source/Drain Activation on Channel-Length for Excimer-Laser-Crystallized Poly-Si Thin-Film Transistors,” Electrochemical and Solid State Lett., vol. 9, no. 2, pp. H8–H11, 2006.
  [40]   Ching-Lin Fan, Tsung-Hsien Yang, Yen-Chung Chen, and Jerry Lin, “Effects of Laser Activation on Device Behavior for Poly-Si Thin-Film Transistors with Different Channel Lengths,” Electronics Lett., vol. 42, no. 6, pp. 374-375, 2006.
  [41]   Ching-Lin Fan, Hui-Lung Lai, and Tsung-Hsien Yang, “Enhanced Crystallization and Improved Reliability for Low-Temperature-Processed Poly-Si TFTs with NH3-plasma Pretreatment Before Crystallization,” IEEE Electron Device Lett., vol. 27, no. 7, pp. 576-578, 2006.
  [42]   Ching-Lin Fan, Mao-Chieh Chen, and Yi Change, “A Novel Two-Step Annealing Technique for the Fabrication of High Performance Low Temperature Poly-Si TFTs,” J. Electrochem. Soc., vol. 150, no. 8, pp. H178-H181, 2003.
  [43]   Ching-Lin Fan, Mao-Chieh Chen, and Yi Chang, “Low-Temperature-Processed Polycrystalline Silicon Thin-Film Transistors Using a New Two-Step Crystallization Technique,” Jpn. J. Appl. Phys., no. 10, vol. 42, pp. 6335-6338, 2003.
  [44]   Ching-Lin Fan and Mao-Chieh Chen, “Performance Improvement of Excimer Laser Annealed Poly-Si TFTs Using Fluorine Ion Implantation,” Electrochemical and Solid State Lett., vol. 5, no. 8, pp. G75-G77, 2002.
  [45]   Ching-Lin Fan and Mao-Chieh Chen, “Effects of N2O Plasma Treatment on the Performance of Excimer-Laser-Annealed Polycrystalline Thin-Film Transistors,” Jpn. J. Appl. Phys., vol. 41, no. 9, pp. 5542-5545, 2002.
  [46]   Ching-Lin Fan and Mao-Chieh Chen, “Correlation Between Electrical Characteristics and Oxide/polysilicon Interface Morphology for Excimer-Laser-Annealed Poly-Si TFTs,” J. Electrochem. Soc., vol. 149, no. 10, pp. G567-G573, 2002.
  [47]   Ching-Lin Fan and Mao-Chieh Chen, “Fabrication of High Performance Low Temperature Poly-Si Thin-Film Transistors Using a Modulated Process,” J. Electrochem. Soc., vol. 149, no. 4, pp. H93-H97, 2002.
  [48]   Ching-Fa Yeh, Tai-Ju Chen, Ching-Lin Fan and Jiann-Shiun Kao, “Investigation of Silicon Dioxide Films Prepared by Room-Temperature Ion-Plating,” J. Appl. Phys., vol. 83, no. 2, pp. 1107-1113, 1998.
  [49]   Ching-Fa Yeh, Tai-Ju Chen, Ching-Lin Fan, and Jiann-Shiun Kao, “Novel Gate Dielectric Films Formed by Ion Plating for Low-Temperature-Processed Polysilicon TFT’s,” IEEE Electron Device Lett., vol. 17, no. 9, pp. 421-424, 1996.
  [50]   Ching-Fa Yeh, Shyue-Shyh Lin, and Ching-Lin Fan, “Thinner Liquid Phase Deposited Oxide for Polysilicon Thin-Film Transistors,” IEEE Electron Device Lett., vol. 16, no. 11, pp. 473-475, 1995.
  [1]   Fan-Ping Tseng, Bo-Jyun Li, and Ching-Lin Fan, "Device Reliability of a-IGZO TFT with Teflon/SiO2 Bilayer Passivation under Gate Bias Stress," The 5th International Symposium on Organic and Inorganic Electronic Materials and Related Nanotechnologies, 2015.
  [2]   Ching-Lin Fan, Ming-Chi Shang, Bo-Jyun Li, Shea-Jue Wang and Win-Der Lee, "Self-Aligned Amorphous Indium–Gallium–Zinc–Oxide Thin-Film Transistor Using A Two-Mask Process Without Etching-Stop Layer," The 21st International Workshop on Active-Matrix Flatpanel Displays and Devices(AMFPD 2014): TFT Technologies and FPD Materials, Kyoto-Japan, 2014.
  [3]   Ching-Lin Fan, Wei-Chun Lin, Yu-Zuo Lin, Min-Chi Shang, Bo-Jyun Li, and Chao-Hung Huang, "Reducing Contact Resistance of Organic ThinFilm Transistor by Using Planar Structure," 2012 International Electron Devices and Material Symposium (IEDMS 2012), Kaohsiung, Taiwan, 2012.
  [4]   Ching-Lin Fan, Yu-Zuo Lin, and Chao-Hung Huang, “Performance Improvement of Pentacene-Based Organic Thin-Film Transistor with the Planar Bottom-Contact Structure and the Bi-Layer Gate Dielectric,” International Workshop on Active-Matrix Flat Panel Displays and Devices (AM-FPD’12), Jul. 4-6, 2012, Kyoto, Japan.
  [5]   Ching-Lin Fan, Yi-Yan Lin, and Shou-Kuan Wang, “Performance Improvement with High Efficiency and Low Damage N2 Plasma Pretreatment for LTPS TFTs,” 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF-11), Jan. 20-21, 2011, Tokyo, Japan.
  [6]   Ching-Lin Fan, Hui-Lung Lai, Tzu-Chien Huang, and Wen-Fa Wu, “Effect of N2O Plasma Post-Treatment on the Performance Improvement of Field Emission Properties for the Multi-Wall Carbon Nanotubes,” 3rd International Symposium on Advanced Plasma Science and its Applications for Nitrides and Nanomaterials (ISPlasma 2011), Mar. 6-9, 2011, Nagoya, Japan.
  [7]   Ching-Lin Fan, Yi-Yan Lin, and Shou-Kuan Wang, “Improvement in Characteristics of LTPS-TFTs with High Efficiency and Low Damage N2 Plasma Pretreatment,” Symposium on Nano Device Technology 2011 (SNDT 2011), Apr. 21-22, 2011, Hsinchu, Taiwan.
  [8]   Ching-Lin Fan, Tsung-Hsien Yang, Ping-Cheng Chiu, and Chin-Yuan Chiang, “Instability of Threshold Voltage under DC Drain Bias Stress in Pentacene-based Organic Thin Film Transistors,” Symposium on Nano Device Technology 2011 (SNDT 2011), Apr. 21-22, 2011, Hsinchu, Taiwan.
  [9]   Ching-Lin Fan, Hui-Lung Lai, Tzu-Chien Huang, and Wen-Fa Wu, “High-Performance N2O Plasma Treated Multiwall Carbon Nanotubes Grown by Thermal Chemical Vapor Deposition,” 219th ECS Meeting, May 1-6, 2011, Montreal, Canada.
  [10]   Ching-Lin Fan, Yu-Zuo Lin, and Chao-Hung Huang, “The Performance Improvement of Pentacene-Based Organic Thin-Film Transistor with the Planar Bottom-Contact Structure,” 2011 IEEE International NanoElectronics Conference (2011 INEC), Jun. 21-24, 2011, Tao-Yuan, Taiwan.
  [11]   Ching-Lin Fan, Hui-Lung Lai, Bo-Jhang Sun, and Kuang-Chi Chao, “A Novel Pixel Circuit to Compensate for Electronic Degradation for Active Matrix Organic Light Emitting Diode Displays with LTPS-TFTs,” International Workshop on Active-Matrix Flat Panel Displays and Devices (AM-FPD’11), Jul. 11-13, 2011, Kyoto, Japan.
  [12]   Ching-Lin Fan and Ping-Cheng Chiu “Fabrication of Pentacene-Based Organic Thin-Film Transistor with Various Low-Temperature CVD Deposition SiO2 as Gate Insulator,” 2011 International Electron Devices and Material Symposium (IEDMS 2011), Nov. 17-18, 2011, Taipei, Taiwan.
  [13]   Ching-Lin Fan, Ping-Cheng Chiu, “Fabrication of Pentacene-Based Organic Thin-Film Transistor with Various Low-Temperature CVD SiO2 as Gate Insulator,” The 3rd International Symposium on Organic and Inorganic Electronic Materials and Related Nanotechnologies (EM-NANO 2010), Jun. 22-25, 2010, Toyama, Japan.
  [14]   Ching-Lin Fan, Hui-Lung Lai, and Jyu-Yu Chang, “Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-Film Transistor and the Organic Light-Emitting Diode for Active-Matrix Organic Light-Emitting Diode Displays,” International Conferences on Flexible and Printed Electronics (ICFPE 2009), Nov. 11-13, 2009, Jeju island, Korea.
  [15]   Ching-Lin Fan, Ping-Cheng Chiu, and Chang-Chih Lin, “Low Temperature Processed (< 100 ℃) SiO2 Gate Insulator by Hollow-Cathode CVD for Organic Thin-Film Transistor,” 2009 TACT International Thin Films Conference (TACT 2009), Dec. 14-16, 2009, Taipei, Taiwan.
  [16]   Ching-Lin Fan, Tsung-Hsien Yang, Chang-Chih Lin, and Chin-Yuan Chiang, “Instability of Threshold Voltage under DC Drain Bias Stress in Pentacene-Based Organic Thin Film Transistors,” 2008 International Conference on Solid State Devices and Materials (SSDM 2008), Sep. 24-26, 2008, Ibaraki, Japan.
  [17]   Tsung-Hsien Yang, Chang-Chih Lin, Cheng-Han Huang, and Ching-Lin Fan, “Performance Improvement of Organic Thin-Film Transistor by N2O Plasma Treatment on the Surface of Gate Insulator,” 2007 International Electron Devices and Material Symposia (IEDMS 2007), Nov. 30-Dec. 1, 2007, Hsinchu, Taiwan.
  [18]   Ching-Lin Fan, Tsung-Hsien Yang, Hui-Lung Lai, and Chien-Chen Tung, “Effects of Source/Drain Activation on Device Behavior for Excimer-Laser Crystallized Poly-Si Thin-Film-Transistors,” 2006 International Workshop on Photonics and Display Technologies (IWPD 2006), Sep. 22-23, 2006, Taipei, Taiwan.
  [19]   Ching-Lin Fan, Hui-Lung Lai, and Tsung-Hsien Yang, “High Performance Low-Temperature Poly-Si Thin-Film-Transistors Using a Stable Continuous-Wave Laser Crystallization,” 2006 International Electron Devices and Material Symposia (IEDMS 2006), Dec. 7-8, 2006, Tainan, Taiwan.
  [20]   Tsung-Hsien Yang, Chin-Yuan Chiang, and Ching-Lin Fan, “Organic Thin-Film Transistor with Various Source/Drain Metal Electrodes and Channel Lengths,” 2006 International Electron Devices and Material Symposia (IEDMS 2006), Dec. 7-8, 2006, Tainan, Taiwan.
  [21]   Ching-Lin Fan, Cheng-I Lin, Chien-Chen Tung, Chih-Yuan Chiang, Hui-Lung Lai, and Tsung-Hsien Yang, “Effects of Source/Drain Activation on Device Behavior for Excimer-Laser-Crystallized Poly-Si Thin-Film-Transistors,” 2005 International Conference on Optics and Photonics Taiwan (OPT 2005), Dec. 9-10, 2005, Tainan, Taiwan.
  [22]   Ching-Lin Fan, Chih-Yuan Chiang, Chien-Chen Tung, Cheng-I Lin, Hui-Lung Lai, and Tsung-Hsien Yang, “High-Throughput Process for Low-Temperature-Processed Poly-Si Thin-Film-Transistors Using High-Density Plasma Pretreatment,” 2005 International Conference on Optics and Photonics Taiwan (OPT 2005), Dec. 9-10, 2005, Tainan, Taiwan.
  [23]   Ching-Lin Fan, Hui-Lung Lai, Cheng-I Lin, Chien-Chen Tung, and Chin-Yuan Chiang, “Novel Plasma Pretreatment for Amorphous Silicon Precursor Film of Low-Temperature-Processed Poly-Si Thin-Film-Transistors,” The 4th Asia-Pacific International Symposium on the Basics and Applications of Plasma Science and Technology (APSPT-4), Dec. 12-14, 2005, Yunlin, Taiwan.
  [24]   Ching-Lin Fan, “Low-Temperature-Processed Poly-Si TFTs with Novel Annealing Technique and Application for AMOLED Design,” 國家奈米元件實驗室合作研究座談會, Nov., 2004, Hsinchu, Taiwan.
  [25]   Ching-Lin Fan, Chih-Pang Chang, Chia-Jung Chang, and Ting-Change Change, “Investigation on Effect of Activation and Dimension for Low-Temperature-Processed Poly-Silicon Thin-Film Transistors,” The Third International Asian Conference on Chemical Vapor Deposition (3rd Asian CVD), Nov. 12-14, 2004, Taipei, Taiwan.
  [26]   Ching-Lin Fan, Chih-Pang Chang, Chia-Jung Chang, and Ting-Chang Chang, “Investigation on Effect of Activation and Dimension for Low-Temperature-Processed Poly-Silicon Thin-Film Transistors,” 2004 International Conference on Optics and Photonics Taiwan (OPT 2004), Dec. 18-19, 2004, Taoyuan, Taiwan.
  [27]   Jung-Chia Chang, Ching-Lin Fan, Chien-Chang Tseng, Chih-Pang Chang, and Yi Chang, “Low-Temperature-Processed Poly-Si TFTs with Novel Annealing Technique and its Application for AMOLED Design,” 2003 International Conference on Optics and Photonics Taiwan (OPT 2003), Dec. 25-26, 2003, Taipei, Taiwan.
  [28]   Ching-Lin Fan, Jung-Chia Chang, Chien-Chang Tseng, Chih-Pang Chang, Chih-Ming Kuo, Chrong-Shyua Chu, and Yi Chang, “Low-Temperature Fabrication of Excimer Laser Annealed Fluorine-Implanted Poly-Si TFTs and AMOLEDs Design,” 2003 International Electron Devices and Material Symposium (2003's EDMS), Nov. 20-22, 2003, Keelung, Taiwan.
  [1]   范慶麟、李政頡、林暐鈞、林禹佐,"上接觸式有機薄膜電晶體兼具保護層的製造方法",中華民國專利,2016年04月。
  [2]   范慶麟,邱秉誠,林昶志,"疏水性二氧化矽層及有機薄膜電晶體的製造方法",中華民國專利第I474400號,2015年02月。
  [3]   范慶麟、林禹佐、黃兆弘,"有機薄膜電晶體及其製造方法",美國專利第US 8,405,081 B2,2013年03月。
  [4]   范慶麟、邱秉誠、林昶志,"疏水性二氧化矽層及有機薄膜電晶體的製造方法"美國專利第US 8,178,447 B1,2012年05月。
  [5]   范慶麟,“形成多晶矽的氨電漿處理方法”,中華民國專利第I345595號,2011年07月。
  [6]   范慶麟、黃添旺、張美熒,“主動驅動式有機電激發光裝置”,中華民國專利第I290008,2007年11月。
  [7]   范慶麟,“薄膜電晶體之多晶矽製造方法”,中華民國專利第201490號,2004年09月。
  [8]   游國仁、簡廷憲、許紹武、林明田、范慶麟,“同時定義不同蝕刻深度孔洞之方法”,中華民國專利第193898號,2003年12月。
  [9]   Ching-Lin Fan, Ping-Cheng Chiu, and Chang-Chih Lin, “Methods of forming hydrophobic silicon dioxide layer and forming organic thin film transistors,” U.S. Patent, 8178447B1 (2012).
  [1]   范慶麟 (2012, Oct). 氟離子前置處理於低溫複晶矽薄膜電晶體電性改善及其畫素補償電路之研究(I). 國科會專題研究計畫成果報告,2012.
  [2]   Ching-Lin Fan, Yu-Zuo Lin, and Chao-Hung Huang, “A high-performance planar organic thin-film transistor,” SPIE News Room (Illumination & Displays), 2012.
  [3]   范慶麟,“高效能小尺寸平面式結構之可撓式有機薄膜電晶體元件之製作與研究(I)”,國科會專題研究計畫成果報告,2011。
  [4]   范慶麟,“高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(Ⅲ)”,國科會專題研究計畫成果報告,2010。
  [5]   范慶麟,“高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(II)”,國科會專題研究計畫成果報告,2009。
  [6]   范慶麟,“薄膜電晶體液晶顯示器驅動電路消耗功率檢測技術及電性規格之開發”,國科會產學計畫成果報告,2008。
  [7]   范慶麟,“高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(I)”,國科會專題研究計畫成果報告,2008。
  [8]   范慶麟,“電漿前置處理在低溫結晶以形成複晶矽薄膜電晶體之研究及其在平面顯示器之應用”,國科會專題研究計畫成果報告,2007。
  [9]   范慶麟,“有機電激發光顯示器主動陣列基板檢測技術之開發與電性規格之訂定”,國科會產學計畫成果報告,2007。
  [10]   范慶麟,“薄膜電晶體有機電激發光顯示器驅動電流量測及面板特性老化系統之開發及其電性之研究”,國科會產學計畫成果報告,2006。
  [11]   范慶麟,“固態連續波雷射結晶於主動驅動有機電激發光顯示器低溫複晶矽薄膜電晶體之研究”,國科會專題研究計畫成果報告,2006。
  [12]   范慶麟,“有機電激發光顯示器主動陣列基版輸出電流測試裝置之開發”,國科會產學計畫成果報告,2005。
  [13]   范慶麟,“研發具有高穩定性的主動驅動有機電激發光顯示器之驅動電路”,國科會專題研究計畫成果報告,2005。
  [14]   范慶麟,“薄膜電晶體在主動驅動有機電激發光平面顯示器之應用與其電性劣化之研究”,國科會產學計畫成果報告,2004。
  [15]   范慶麟、張志榜、曾建章,“The application of Excimer Laser Annealed on AMOLED”,真空科技,第17卷,第1期,pp. 57-63,July,2004。
  [16]  
  [17]  

計畫名稱 計畫總額 執行始於 執行結束 委託單位
新式節能微波後處理與高穩定性保護層之技術開發及其應用於可撓式金屬氧化物薄膜電晶體及電路之研究 10408 10507 國科會
新式主動層圖案化與奈米複合閘極介電層結合以製作先進可撓式有機薄膜電晶體之研究 10208 10407 國科會
高效能次微米互補式有機薄膜電晶體之製作與研究(I) 10108 10207 國科會
氟離子前置處理於低溫複晶矽薄膜電晶體電性改善及其畫素補償電路之研究(I) 10008 10107 國科會
高效能小尺寸平面式結構之可撓式有機薄膜電晶體元件之製作與研究(I) 9908 10007 國科會
高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(Ⅲ) 9808 9907 國科會
高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(II) 9708 9807 國科會
高性能長壽命可撓式有機薄膜電晶體元件之製作與研究(I) 9608 9707 國科會
薄膜電晶體液晶顯示器驅動電路消耗功率檢測技術及電性規格之開發 9605 9704 國科會
電漿前置處理在低溫結晶以形成複晶矽薄膜電晶體之研究及其在平面顯示器之應用 9508 9607 國科會
有機電激發光顯示器主動陣列基板檢測技術之開發與電性規格之訂定 9505 9604 國科會
固態連續波雷射結晶於主動驅動有機電激發光顯示器低溫複晶矽薄膜電晶體之研究 9408 9507 國科會
薄膜電晶體有機電激發光顯示器驅動電流量測及面板特性老化系統之開發及其電性之研究 9405 9504 國科會
研發具有高穩定性的主動驅動有機電激發光顯示器之驅動電路 9308 9407 國科會
有機電激發光顯示器主動陣列基版輸出電流測試裝置之開發 9305 9404 國科會
薄膜電晶體在主動驅動有機電激發光平面顯示器之應用與其電性劣化之研究 9206 9305 國科會

指導學生
學年 論文題目 學生
103 底接觸式結構有機薄膜電晶體及其性能改善之研究 林禹佐
102 主動式有機發光顯示器驅動元件的研究及其畫素電路設計 賴輝龍
101 有機薄膜電晶體元件製作及其性能與可靠度改善之研究 邱秉誠
100 低溫多晶矽薄膜電晶體之研製與應用 林宜彥
98 有機薄膜電晶體及其閘極絕緣層表面處理技術之研究 楊宗憲
學年 論文題目 學生
103 應用五苯環氧化物於有機薄膜電晶體特性與可靠度改善之研究 陳皓偉
103 應用於三維度主動式有機發光二極體顯示器新型畫素電 壓補償電路 蔡永坤
102 以微波加熱快速交聯之PVP應用於有機薄膜電晶體閘極絕緣層之研究 夏懋原
102 逆偏壓之新式電壓編碼畫素電路設計應用於補償主動式有機發光二極體顯示器電壓漂移及延長其生命期 楊創丞
101 三維度主動式有機發光二極體顯示器之新式電壓編碼畫素電路設計 陳奕冏
101 p型摻雜注入層應用於有機薄膜電晶體特性改善之研究 張翔昇
101 使用傳統黃光微影製程製作新型主動層圖案化上接觸式有機薄膜電晶體之研究 李政頡
101 具自我對準新穎結構氧化銦鎵鋅薄膜電晶體之製作與其可靠度改善之研究 李柏軍
100 新型電壓編碼畫素電路設計使用低溫複晶矽薄膜電晶體於主動有機發光二極體顯示器之應用 郭柏良
100 可撓式有機薄膜電晶體之製作與分析 彭瀚興
99 改善電性衰退於主動式有機發光二極體新式低溫多晶矽薄膜電晶體畫素設計 趙廣祺
99 次微米平坦化結構有機薄膜電晶體 陳綏之
99 以氟佈植處理之次微米低溫多晶矽P型薄膜電晶體特性改善研究 胡瑀梵
98 新型電壓編碼畫素電路設計與模擬於主動有機發光二極體顯示器之應用 孫伯彰
98 新型平面化下接觸式結構有機薄膜電晶體 黃兆弘
98 通道層處理技術於低溫複晶矽薄膜電晶體特性改善之研究 王守寬
97 薄膜電晶體於主動式有機發光二極體之新式電流及電壓編程畫素電路設計 張修誠
97 複晶矽薄膜電晶體於主動式交流驅動有機發光二極體顯示器之新式畫素電路設計與模擬 劉晏瑋
97 帶有以CF4電漿處理之緩衝隔絕層之低溫複晶矽薄膜電晶體特性改善研究 楊鈞傑
96 100 ℃以下製作有機薄膜電晶體特性之研究 林昶志
96 主動式有機發光二極體顯示器亮度均勻性改善之畫素電路設計與模擬 林育生
96 複晶矽薄膜電晶體於主動式有機發光二極體顯示器之新式畫素電路設計 林柏辛
95 N2O電漿後處理對奈米碳管場發射特性改善之研究 黃子建
95 快速熱退火對多通道複晶矽薄膜電晶體特性改善之研究 楊雁行
95 閘極絕緣層表面處理在低溫製程有機薄膜電晶體特性改善之研究 黃正翰
95 新穎主動有機發光二極體之畫素驅動電路設計與模擬 張居裕
95 低溫多晶矽薄膜電晶體面板之電性檢測技術與缺陷分析 林建邦
94 薄膜電晶體在交流電壓下之可靠度與性能改善之研究 童建成
94 有機薄膜電晶體的特性改善與可靠度的研究 姜智淵
94 有機薄膜電晶體通道與介電層界面特性改善技術之研究 林政儀
學年 專題題目 學生
99 有機薄膜電晶體特性改善之研究 邱榮全
98 有機薄膜電晶體的模擬與量測 黃中政、林伯彥
94 TFT電性量測及製程之研究 蘇稚翔、關叡鉉、林禹佐
93 薄膜電晶體液晶顯示器陣列元件工程暨電特性之研究 葉茂偉、陳漢昇
年份 事蹟