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[1]
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Hanqing Xing, Degang Chen, Geiger R., Le Jin,"System identification -based reduced-code testing for pipeline ADCs’linearity test", IEEE International Symposium on Circuits and Systems,pp.2402-2405 ,May 2008 |
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[2]
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Hanqing Xing, Degang Chen, Geiger R.,"On-chip at-speed linearity testing of high-resolution high-speed DACs using DDEM ADCs with dithering"",IEEE International Conference on Electro/Information Technology,PP. 117-122,May 2008 |
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[3]
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Sloat J.D., Geiger R.L.,"An inexpensive microelectronic environmental test chamber",IEEE International Conference on Electro/Information Technology,PP. 168-170,May 2008 |
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[4]
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Jun He, Sanyi Zhan, Degang Chen, Geiger R.,"A simple and accurate method to predict offset voltage in dynamic comparators",IEEE International Symposium on Circuits and Systems, pp. 1934-1937, May 2008 |
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[5]
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Katyal V., Geiger R.L., Chen D.J.,"Adjustable hysteresis CMOS Schmitt triggers",IEEE International Symposium on Circuits and Systems, pp. 1938-1941, May 2008 |
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[6]
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Jun He, Geiger. R, Degang Chen,"A detailed analysis of nonideal effects on high precision bandgap voltage references",Midwest Symposium on Circuits and Systems,pp382-385,Aug. 2008 |
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[7]
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Yingkun Gai, Geiger. R, Degang Chen,"Noise analysis in hold phase for switched-capacitor circuits",Midwest Symposium on Circuits and Systems,pp.45-48,Aug. 2008 |
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[8]
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Le Jin, Degang Chen, Geiger R.,"Code-Density Test of Analog-to-Digital Converters Using Single Low-Linearity Stimulus Signal", IEEE VLSI Test Symposium,pp.303-310,May 2007 |
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[9]
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Hanjun Jiang, Degang Chen, Geiger R.L.,"Deterministic DEM DAC Performance Analysis", IEEE International Symposium on Circuits and Systems,pp.3860-3863,May 2007 |
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[10]
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Hanqing Xing, Hanjun Jiang, Degang Chen, Geiger R.,"A fully digital-compatible BIST strategy for ADC linearity testing",IEEE International Test Conference,pp. 1-10,Oct. 2007 |
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[11]
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Hanqing Xing, Le Jin, Degang Chen, Geiger. R, " Characterization of a current-mode bandgap circuit structure for high-precision reference applications", IEEE International Symposium on Circuits and Systems, pp. 4, May 2006 |
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[12]
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Le Jin, Hanqing Xing, Degang Chen, Geiger. R,"A self-calibrated bandgap voltage reference with 0.5 ppm/°C temperature coefficient", IEEE International Symposium on Circuits and Systems, pp. 4, May 2006 |
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[13]
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Chao Su, Geiger R.L.,"Dynamic calibration of current-steering DAC",IEEE International Symposium on Circuits and Systems,pp.4,May 2006 |
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[14]
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Wada K., Geiger R.L.,"Minimization of total area in integrated active RC filters",IEEE International Symposium on Circuits and Systems,pp.4,May 2006 |
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[15]
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Xin Dai, Degang Chen, Geiger R.,"Explicit characterization of bandgap references",IEEE International Symposium on Circuits and Systems,pp.4,May 2006 |
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[16]
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Yu Lin, Geiger R.,"Unit resistor characterization for matching-critical circuit design",IEEE International Symposium on Circuits and Systems,pp.4,May 2006 |
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[17]
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Fei Haibo, Geiger Randall L.,"Aggressive Area Scaling in Passive Transresistance Networks",IEEE International Midwest Symposium on Circuits and Systems,pp.536 - 539,Aug. 2006 |
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[18]
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Fei Haibo, Geiger Randall L.,"Aggressive Area Scaling in Passive Transresistance Networks", IEEE International Midwest Symposium on Circuits and Systems,pp.536-539,Aug. 2006 |
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[19]
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Le Jin, Degang Chen, Randall Geiger,"Linearity Test of Analog-to-Digital Converters Using Kalman Filtering",IEEE International Test Conference,pp.1 - 9,Oct. 2006 |
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[20]
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Le Jin, Hosam Haggag, Geiger R., Degang Chen,"Testing of Precision DACs Using Low-Resolution ADCs with Dithering",IEEE International Test Conference,pp.1 - 10,Oct. 2006 |
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[21]
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Katyal Vipul, Geiger Randall L., Chen Degang J.,"A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs",IEEE Asia Pacific Conference on Circuits and Systems,pp.5 - 8,Dec. 2006 |
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[22]
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S. Thoka and R.L. Geiger, “Fast-Switching Adaptive Bandwidth Frequency Synthesizer using a Loop Filter with Switched Zero-Resistor Array”, IEEE International Symposium on Circuits and Systems, pp. 5373-5376, Kobe Japan, May 2005. |
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[23]
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H. Xing, D. Chen, and R.L. Geiger, ”A Two-Step DDEM ADC for Accurate and Cost Effective DAC Testing”, IEEE International Symposium on Circuits and Systems, pp. 4289-4292, Kobe Japan, May 2005. |
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[24]
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Z. Yu, D. Chen, R.L. Geiger, and Y. Papantonopoulo, “Pipelined ADC Linearity Testing with Dramatically Reduced Capture Time ”, IEEE International Symposium on Circuits and Systems, pp. 792-795, Kobe Japan, May 2005. |
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[25]
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D. Chen, Z. Yu, and R.L. Geiger, “An Adaptive Truly Background Calibration Method for High Speed Pipeline ADC Design”, IEEE International Symposium on Circuits and Systems, pp. 6190-6193, Kobe Japan, May 2005. |
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[26]
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W. Liu, H. Xing, L. Jin, R.L. Geiger, and D. Chen, “ A Test Strategy for Time-to-Digital Converters Using Dynamic Element Matching and Dithering”, pp. 3809-3812, IEEE International Symposium on Circuits and Systems, Kobe Japan, May 2005. |
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[27]
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H. Jiang, B. Olleta, D. Chen, and R.L. Geiger, “ A Segmented Thermometer Coded DAC with Deterministic Dynamic Element Matching for High Resolution ADC Test”, IEEE International Symposium on Circuits and Systems, pp. 784-7887, Kobe Japan, May 2005. |
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[28]
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L. Jin, D. Chen, and R.L. Geiger, “ A Digital Self-Calibration Algorithm for ADCs Based on Histogram Test Using Low-Linearity Input Signals”, IEEE International Symposium on Circuits and Systems, pp. 1378-1381, Kobe Japan, May 2005. |
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[29]
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H. Jiang, D. Chen, and R.L. Geiger, “ Dither Incorporated Deterministic Dynamic Element Matching for High Resolution ADC Test Using Extremely Low Resolution DACs, ” IEEE International Symposium on Circuits and Systems, pp. 4285-4288, Kobe Japan, May 2005. |
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[30]
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X. Dai, C. He, H. Xing, D. Chen, and R.L. Geiger, “ An n-th Order Central Symmetrical Layout Pattern for Nonlinear Gradient Cancellation”, IEEE International Symposium on Circuits and Systems, pp. 4835-4838. Kobe Japan, May 2005. |
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[31]
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X. Dai, D. Chen, and R.L. Geiger, “ A Cost-Effective Histogram Test-Based Algorithm for Digital Calibration of High-Precision Pipelined ADCs”, IEEE International Symposium on Circuits and Systems, pp. 4831- 4834, Kobe Japan, May 2005. |
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[32]
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Y. Lin, V. Katyal, M. Schlarmann, and R.L. Geiger, “ kT/C Constrained Optimization of Power in Pipelined ADCs”, IEEE International Symposium on Circuits and Systems, pp. 1968-1971, Kobe Japan, May 2005. |
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[33]
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V. Katyal, Y. Lin, and R.L. Geiger, “Power Dependence of Feedback Amplifiers on Op Amp Architecture”, IEEE International Symposium on Circuits and Systems, pp. 1618-1621, Kobe Japan, May 2005. |
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[34]
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Chao Su, Xin Dai and Geiger, R.L., “A novel dynamic calibration approach for current-steering DACS”, Proceedings of the IEEE International Workshop on VLSI Design and Video Technology, pp. 40- 43, Shanghai, May 2005. |
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[35]
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Parthasarathy, K.m Kuyel, T., Zhongjun Yu, Degang Chen and Geiger, R.L., ”A 16-bit resistor string dac with full-calibration at final test”, IEEE International Test Conference, pp. 66 –75, Nov 2005. |
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[36]
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Le Jin, Parthasarathy, K., Kuyel, T., Geiger, R and Degang Chen; “High-performance adc linearity test using low-precision signals in non-stationary environments”, IEEE International Test Conference, pp. 1182 – 1191, Nov 2005. |
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[37]
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Soufi, B.; Malik, S.Q.; Geiger, R.L “A capacitor sharing technique for RSD cyclic ADC”, IEEE Midwest Symposium on Circuits and Systems, pp. 859-862, Cincinnati, Ohio August 2005. |
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[38]
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Katyal, V., Yu Lin, Geiger, R.L. and Chen, D.J., “Statistical modeling of over-range protection requirement for a switched capacitor inter-stage gain amplifier”, IEEE Midwest Symposium on Circuits and Systems, pp. 1819-1822, Cincinnati, Ohio August 2005. |
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[39]
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Malik, S.Q.and Geiger, R.L., “Simultaneous capacitor sharing and scaling for reduced power in pipeline ADCs”, IEEE Midwest Symposium on Circuits and Systems, pp. 1015-1018, Cincinnati, Ohio August 2005. |
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[40]
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Amourah, M.M.; Malik, S.Q.; Geiger, R.L.; “A new design technique for rail-to-rail amplifiers”, IEEE Midwest Symposium on Circuits and Systems, pp. 263-266, Cincinnati, Ohio August 2005. |
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[41]
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Yu Lin, Katyal, V and Geiger, R.L., “New over-range protection scheme in pipelined data converters” IEEE Midwest Symposium on Circuits and Systems, pp. 283-286, Cincinnati, Ohio August 2005. |
