教師資料

施敏 Simon-Min Sze
職稱
榮譽講座教授
學歷
美國史丹佛大學電機工程博士(1963)
電子郵件
simonsze@faculty.nctu.edu.tw
辦公室

Office Hours
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個人網頁 http://www.ee.nctu.edu.tw/People/Professor/T7914-20091214cf.doc
實驗室 施敏教授實驗室團隊簡介
研究領域 •半導體物理與元件 •積體電路製程技術
開授課程

2006 ~  迄今 National Chiao Tung University Honorary Chair Professor
2006 ~  迄今 Stanford University Consulting Professor
2004 ~  迄今 National Nano-Device Laboratories, Consultant National Science Council
1999 ~  2008 Industrial Technology Research Institute Technical Advisor
1998 ~  2004 National Nano-Device Laboratories, Director National Science Council
1990 ~  2006 National Chiao Tung University Distinguished Professor
1990 ~  1996 Microelectronic and Information Science Director Research Center, National Chiao Tung Univ.
1984 ~  1986 IEEE Electron Device Letters Associate Editor
1980 ~  1984 Solid State Electronics Associate Editor
1974 ~  1977 National Taiwan University Special Chair Professor
1974 ~  1977 Industrial Technology Research Institute Consultant
1974 ~  1978 National Science Council Consultant
1968 ~  1969 National Chiao Tung University C.Y. Tung Chair Professor
1963 ~  1989 Bell Telephone Laboratories Member of Tech. Staff


2007 Lifetime Achievement Award, Ministry of Economic Affairs, ROC.
2007 Distinguished Alumnus of the National Taiwan University
1998 Foreign Member, Chinese Academy of Engineering
1998 National Science and Technology Prize, ROC.
1996 National Endowed Chair Professor Award, Ministry of Education, ROC.
1995 Member, US National Academy of Engineering
1994 Academician, Academia Sinica
1991 IEEE J. J. Ebers Awards
1977 Fellow of IEEE
1972 Member of Phi Tau Phi Scholastic Honor Society
1969 Dr. Sun Yet-Sun Award
1960 Member of Sigma Xi Scholastic Honor Society

研究成果
  [1]   “Diffusion of Zinc and Tin in Indium Antimonide,” with L. Y. Wei, Phys. Rev., 124, 84 (1961).
  [2]   “Photoelectric Determination of the Image Force Dielectric Constant for Hot Electrons in Schottky Barriers,” with C. R. Crowell and D. Kahng, J. Appl. Phys., 35, 2534 (1964).
  [3]   “Avalanche Breakdown Voltages of Abrupt and Linearly Graded p-n Junctions in Ge, Si, GaAs, and GaP,” with G. Gibbons, Appl. Phys. Lett., 8, 111 (1966).
  [4]   “Current Transport in Metal–Semiconductor Barriers,” with C. R. Crowell, Solid State Electron, 9, 1035 (1966).
  [5]   “Current Transport and Maximum Dielectric Strength of Silicon Nitride,” J. Appl. Phys., 38, 2951 (1967).
  [6]   “A Floating Gate and Its Application to Memory Devices,” with D. Kahng, Bell Syst. Tech. J., 46, 1288 (1967).
  [7]   “Schottky Barrier Insulated-Gate Field-Effect Transistors,” with M. P. Lepselter, Proc. IEEE, 56, 1088 (1968).
  [8]   “Carrier Transport and Storage Effects in Au Ion Implanted SiO2 Structure,” with L. I. Chen and K. A. Pickar, Solid State Electron, 15, 979 (1972).
  [9]   “Formation of Ge Nanocrystals Embedded in Silicon-Oxygen-Nitride Layers,” with C. H. Tu et al., Appl. Phys. Lett., 89, 1 (2006).
  [10]   “A Novel Nanowire Channel Poly-Si TFT Functioned as Transistor and Nonvolatile SONOS Memory”, with S. C. Chen et al., IEEE Elec. Dev. Lett., 28, 809 (2007).
  [11]   “Formation of Cobalt-Silicide Nanocrystals in Ge-Doped Dielectric Layer for the Application of Nonvolatile Memory”, with C. W. Hu et al., Appl. Phys. Lett., 92, 152115 (2008).
  [12]   “Improvement of Charge-storage Characteristics of Mo Nanocrystal Memory by Double-layer Structure”, with. C. C. Lin et al., J. Electrochem. Soc., 1, 156 H276 (2009).
  [13]   “NiSiGe Nanocrystals for Nonvolatile Memory Devices”, with C.W. Hu et al., Appl. Phys. Lett., 94(6), 062102 (2009).
  [1]   “Surface Barrier Semiconductor Technology Device”, with C.R.Crowell, US Patents 3349297(1964).
  [2]   “Method of Making Contact Electrodes to Silicon Gate, Source and Drain Regions of a Semiconductor Device”, with M. P. Lepselter, US Patent 4343082 (1980).
  [3]   “Semiconductor-on-Insulator (SOI) Devices and SOI IC Fabrication Method”, with K. K. Ng, US Patent 4763183 (1986).
  [4]   “Light Emitting Diode with High Luminance and Method for Making the Same”, with S. H. Chen, et al., US Patent 64448584 (2000).
  [5]   “Nanocrystal Floating Gate and Method of Manufacturing”, with T. C. Chang, et al., ROC Patent I231531 (2005).
  [6]   “Non-volatile Memory Based on Quantum Dot Storage Cell and Method of Fabrication”, with P. C. Liu, ROC Patent I232582 (2005).
  [7]   “Non-volatile Memory and Method of Manufacturing Floating Gate”, with T. C. Chang, et al., US Patent 7235443 (2006).
  [1]   Physics of Semiconductor Devices, 812 pages, Wiley Interscience, New York, 1969.
  [2]   Semiconductor Devices: Physics and Technology, 2nd Ed., 564 pages, Wiley, New York, 2002.
  [3]   Physics of Semiconductor Devices, 3rd Ed., with K.K.Ng, 815 pages, Wiley Interscience, Hoboken, 2007.
  [4]   VLSI Technology, 2nd Ed., 672 pages, McGraw Hill, New York, 1988.
  [5]   Semiconductor Sensors, 550 pages, Wiley Interscience, New York, 1994.
  [6]   ULSI Devices, with C.Y. Chang, 729 pages, Wiley Interscience, New York, 2000.

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