Faculty

Chung-An Shen Associate Professor
photo
Position
Associate Professor
Education
Ph.D. in Electrical and Computer Engineering, University of California, Irvine 
E-mail
cashen@mail.ntust.edu.tw
Room
IB 714-2
Office hour
9:00 ~ 10:20, Tuesday, 10:30 ~ 12:00, Friday, or by appointment
Telephone
886-2-2730-3275
FAX
886-2-27376424
Homepage
Laboratory
Major Field
Algorithm and VLSI architecture design for wireless communication and multimedia systems, Digital circuits design, Embedded systems and MPSOC systems design for IOT applications.
Course
FPGA system design, VLSI system design, Digital logic design and practice

Record
2012.08
~
Present Assistant Professor, Dept. of Electronic Engineering, NTUST
2012.03
~
2012.07 Senior Engineer, Qualcomm Inc, CA, USA
2011.05
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2011.09 Intern Enrineer, Mindspeed Technologies, CA, USA
2008.04
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2012.03 Graduate Student Researcher, Wireless Systems and Circuits Lab, UC Irvine
2004.04
~
2007.08 DSP Engineer and Technical Instructor, Texas Instruments Asia
Honor & Awards

Research

Research Achievement
Journal
[1] P.-K. Hsu and C.-A. Shen, "The VLSI Architecture of a Highly Efficient Deblocking Filter for HEVC Systems," IEEE Transactions on Circuits and Systems for Video Technology," vol. 27, no. 5, pp. 1091-1103, May 2017.
[2] T.-W. Chu, C.-A. Shen, and C.-W. Wu " The Hardware and Software Co-design of a Configurable QoS for Video Streaming based on OpenFlow Protocol and NetFPGA Platform," Multimedia Tools and Applications, accepted, May 2017.
[3] T.-T. Liao, C.-A. Shen, and Y.-H. Tseng " The Algorithm and VLSI Architecture of a High Efficient Motion Estimation with Adaptive Search Range for HEVC Systems," Journal of Real-Time Image Processing, accepted, May 2017.
[4] C.-A. Shen, C.-P. Yu, and C.-H. Huang, " Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications with Convolutional Codes ," IEEE Transactions on VLSI Systems, vol. 24, no. 2, pp. 587-599 Feb. 2016.
[5] P.-j. Hsu, Y.-H. Tseng, W.-J. Chen, and C.-A. Shen, "The design and implementation of a configurable MIMO detection system on the NOC-based multicore platform, " Elsevier Microelectronics Journal, , vol. 56, pp. 25-37, Oct. 2016.
[6] C.-Y. Lung and C.-A. Shen, " Design and Implementation of a Highly Efficient Fractional Motion Estimation for the HEVC Encoder," Journal of Real-Time Image Processing, on-line access, Dec. 2016.
[7] M. S. Khairy, C.-A. Shen, A. M. Eltawil, and F. Kurdahi, " Algorithms and Architectures of Energy-Efficient Error-Resilient MIMO Detectors for Memory-Dominated Wireless Communication Systems," IEEE Transactions on Circuits and Systems I, vol.61, no.7, pp.2159-2171, Jul. 2014.
[8] C. P. Sukumar, C.-A. Shen, and A. M. Eltawil, " Joint Detection and Decoding for MIMO Systems Using Convolutional Codes: Algorithm and VLSI Architecture," IEEE Transaction on Circuits and Systems-I, vol. 59, no. 9, pp. 1919-1931, Sep. 2012.
[9] C.-A. Shen, A. M. Eltawil, S. Mondal, and K. N. Salama, " A Best-First Soft/Hard Decision Tree Searching MIMO Decoder for a 4 x 4 64-QAM System," IEEE Transactions on VLSI Systems, vol. 20, no. 8, pp. 1537-1541, Aug. 2012.
[10] C.-A. Shen and A. M. Eltawil, " A Radius Adaptive K-Best Decoder with Early Termination: Algorithm and VLSI Architecture," IEEE Transaction on Circuits and Systems-I, vol. 57, no. 9, pp. 2476-2486, Sep. 2010.
[11] C.-A. Shen, K. N. Salama, and A. M. Eltawil, " Evaluation Framework for K-Best Sphere Decoders," Journal of Circuits, Systems, and Computers, vol. 19, no. 5, pp. 975-995, Aug. 2010.
[12] S. Mondal, A. M. Eltawil, C.-A. Shen, and K. N. Salama, "Design and Implementation of a Sort Free K-Best Sphere Decoder," IEEE Transactions on VLSI Systems, vol. 18, no. 10, pp. 1497-1501, Oct. 2010.
Conference
[1] W.-E. Liang and C.-A. Shen " A High Performance Media Server and QoS Routing for SVC Streaming based on Software-Defined Networking ," to appear in ICNC, Jan. 2017.
[2] C.-H. Huang, C.-P. Yu, and C.-A. Shen, "Tree search based configurable joint detection and decoding algorithms for MIMO systems," 2016 International Conference on Computing, Networking and Communications (ICNC), 2016, pp. 1-5.
[3] T.-T. Tseng, W.-E. Liang, and C.-A. Shen, "The Design of an Emulation Framework for Variable Run-Time MIMO Detection Systems based on FPGA Platform," 2016 International Conference on Future Computer and Communication (ICFCC), 2016.
[4] W.-Y. Chen, Daniel Guenther, C.-A. Shen, and Gerd Ascheid " Design and Implementation of a Low-Latency, High-Throughput Sorted QR Decomposition Circuit for MIMO Communications," to appear in IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Oct. 2016.
[5] P.-H. Hsiung, C.-A. Shen, and H.-C. Wang, " The Joint Detection and Decoding Approach for MIMO Systems with Turbo Codes," in proceeding of IEEE ISCAS 2015.
[6] C. Panjaitan , C.-A. Shen, and S.-J. Ruan, " A Low Complexity Depth Map Compression Approach for Microsoft Kinect Devices," IEEE Global Conference on Consumer Electronics (GCCE) 2015.
[7] Z.-T. Liao and C.-A. Shen, "A novel search window selection scheme for the motion estimation of HEVC systems," 2015 International SoC Design Conference (ISOCC), 2015, pp. 267-268.
[8] C.-A. Shen, M. S. Khairy, A. M. Eltawil, and F. Kurdahi, " Low Power Reduced-Complexity Error-Resilient MIMO Detector ," in proceedings of IEEE ISCAS 2014, pp.1688-1691, Jun 2014.
[9] W.-Y. Chen and C.-A. Shen, " Architectural Optimization of Low Latency QR-Decomposition for MIMO Communications," in proceeding of IEEE Asia Pacific Wireless Communications Symposium (APWCS), Aug 2014.
[10] C.-Y. Lung and C.-A. Shen, " A High Throughput Interpolator for the Fractional Motion Estimation of High Efficient Video Coding (HEVC) Systems," in proceeding of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Nov. 2014. [Best Paper Award]
[11] M. K. Khairy, C.-A. Shen, A. M. Eltawil, and F. Kurdahi, " Error Resilient MIMO Detector for Memory-Dominated Wireless Communication Systems," to appear in IEEE Global Communications Conference ( Globecom), Dec. 2012.
[12] C.-A. Shen and A. M. Eltawil, "An Adaptive Reduced Complexity K-Best Decoding Algorithm with Early Termination," in proceedings of IEEE Consumer Communications and Networking Conference(CCNC), pp. 1-5, 2010.
[13] C.-A. Shen, A. M. Eltawil, S. Mondal, and K. N. Salama, " A Best-First Tree-Searching Approach for ML Decoding in MIMO System," in proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3533-3536, 2010.
Patent
Book
Other

Project
Title Total Amount Excution Duration Client
針對OpenFlow網路之高節能和高安全性整合設計平台技術研究與開發子計畫三(3/3) 0000000 105 - 106 Ministry of Science and Technology
基於嵌入式平台之機器視覺系統設計與實現 250000 105 - 106 亞郁科技
基於FPGA之電信網路分析系統設計與實現 300000 105 - 106 E-element
Design and Implementation of a IC Inspection System on the Embedded Platform 000000 104 - 104 亞郁科技
針對OpenFlow網路之高節能和高安全性整合設計平台技術研究與開發子計畫三(2/3) 0000000 104 - 105 MOST
The VLSI Architecture and Circuit of a Low Complexity Motion Estimation System for the HEVC Standard with UHD Video 600,000 104 - 105 Ministry of Science and Technology
Design and Implementation of QvSwitch software for Software Defined Networking 000000 103 - 104 Qnap Inc.
針對OpenFlow網路之高節能和高安全性整合設計平台技術研究與開發子計畫三(1/3) 0000000 103 - 104 MOST
Low power efficient wireless receiver based on joint MIMO detection and Turbo code decoding 1,456,000 102 - 104 NSC
Joint MIMO detection and channel decoding for generalized system configurations: Algorithms and VLSI architectures 680,000 101 - 102 National Science Council, R.O.C

Student
Ph.D
M.S
105
A High Performance Media Server and QoS Routing for SVC Streaming Based on Software-Defined Networking
梁維恩
105
The Design and Implementation of an OpenFlow Switch Supporting Configurable QoS based on NetFPGA-CML
出騰偉
105
The Hardware and Software Co-Design for a Software Defined Networking Switch System
劉祐齊
105
The VLSI Architecture of a High-Throughput Configurable Pre-processor for MIMO Detections
曾梓庭
105
The Algorithm and VLSI Architecture of a High-Throughput Motion Estimation with Adaptive Search Range for HEVC Systems
廖紫廷
104
VLSI Architecture of High Throughput Deblocking Filter for HEVC Systems
許博凱
104
The VLSI Architecture of a Low-Latency High-Throughput Sorted QR Processor for MIMO Systems
陳威揚
104
The Design of A Large-Scale MIMO Detection System on The NOC Based Multicore Platform
許柏仁
104
The VLSI Architecture of a Low Complexity Fractional Motion Estimation for HEVC Systems
龍純瑜
103
VLSI Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communication Systems
游家博
103
Tree Search Based Configurable Joint Detection and Decoding Algorithms for MIMO Wireless Communications
黃建豪
102
An industrial IC chip marking inspection system based on the Quad-Core embedded processor
莊賀任
Student's Project
103
基於NAS(Network Attached Storage)之SDN(Software Define Networking)環境開發
彭立宇
103
基於軟體定義網路標準之openflow交換器實現
孔德翰, 謝禾彥
103
基於軟硬體共同設計之智慧型交通辨識系統
謝禾彥, 鄭仁豪
103
基於嵌入式系統之條碼辨識
陳奐廷 , 林佑晟
102
基於嵌入式系統之IC檢測系統(最佳專題)
許梵豪
Student's Honor
  2015
陳威揚論文名列 VLSI Design/CAD Symposium 2015 最佳論文候選
  2014
陳威揚, 許柏仁榮獲教育部積體電路設計競賽標準元件組特優
  2014
龍純瑜榮獲 IEEE APCCAS 最佳論文獎