Faculty

Ming-Bo Lin Professor
photo
Position
Professor
Education
Ph.D., University of Maryland at College Park, U.S.A. 
E-mail
mblin@mail.ntust.edu.tw
Room
EE 409
Office hour
星期一、二早上8:00到12:00
Telephone
886-2-27376415
FAX
886-2-27376424
Homepage
Laboratory
Major Field
Embedded systems design, Digital Systems Design, ASIC/FPGA Systems Design, SoC platform IP designs, Mixed-Signal IC Design, Digital Integrated Circuit Designs, Parallel Architectures and Algorithms
Course
VLSI Systems Design, Digital Integrated Circuits Analysis and Design, FPGA Systems Design and Practice, FPGA System Design and Applications

Record
2009
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2009 Workshop Chair, session chair, reviewer, Workshop on Computer Architectures, Embedded Systems, and VLSI/EDA in 2009 National Computer Symposium (NCS 2009)
2008
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now 國家晶片系統設計中心晶片製作審查委員
2006
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2007 第二、三屆盛群盃HOLTEK MCU 創意大賽評審
2006
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2019 財團法人旺宏教育基金會金矽獎初賽評審團委員(第六至十九屆)
2002
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2004 經濟部工業局半導體產發展推動計畫設計組課程規劃委員
2001
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2002 國立台灣大學資訊管理學系兼任教授
2001
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2002 經濟部智慧財產局專利外審委員
2001
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now 國立台灣科技大學電子工程系專任教授
1999
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2002 國立台灣科技大學育成中心進駐廠商(宜昇科技公)技術諮詢顧問
1998
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2001 國立台灣大學資訊管理學系兼任副教授
1996
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2000 財政部關稅總局稅則分類估價評議委員會委員
1992
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2001 國立台灣科技大學電子工程系專任副教授
1986
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1992 國立台灣工業技術學院(現為國立台灣科技大學)電子工程系專任講師
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- 考試院命題、閱卷委員、典試委員
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- 二技聯合招生委員會專業科目命題委員
Honor & Awards
2007
Distinguished Teaching Award of National Taiwan University of Science and Technology

Research

Research Achievement
Journal
[1] Shao-Hua Chen, Yi-Sheng Lin, and Ming-Bo Lin, " A NoC-based sparse matrix multiplication system, " International Journal of Electronics and Information Engineering, Vol.2, No.2, PP. 53-69, June 2015.
[2] Mehrdad Fallahpour, Ming-Bo Lin, and Chang-Hong Lin, "Parallel photon- mapping rendering on a mesh-NoC-based MPSoC platform,” Journal of Parallel and Distributed Computing, Vol. 74, No. 7, pp. 2626-2638, July 2014.
[3] Shao-Hua Chen and Ming-Bo Lin, "An all-digital, cyclic and synthesizable TDC in the ADPLL-based clocking digital systems for multidomain power management," Applied Mechanics and Materials, Vol. 597, pp. 515-518, July 2014.
[4] Shao-Hua Chen and Ming-Bo Lin, “A synthesizable architecture of all-digit cyclic TDCs,” IEICE Electronics Express, Vol. 11, No. 20, pp. 1-12, November 2014.
[5] Cheng-Hung Tsai, Ying-Wen Bai, Ming-Bo Lin, Roger Jia Rong Jhang, and Chih-Yu Chung, “Reduce the standby power consumption of a microwave oven,” IEEE Transactions on Consumer Electronics, Vol. 59, No. 1, pp. 54-61, February 2013
[6] Cheng-Hung Tsai, Ying-Wen Bai, Ming-Bo Lin, Roger Jia Rong Jhang, and Yen-Wen Lin, " Design and implementation of a PIR luminaire with zero standby power using a photovoltaic array in enough daylight," IEEE Transactions on Consumer Electronics, Vol. 59, No. 3, pp. 499-506, August 2013.
[7] Cheng-Hung Tsai, Ying-Wen Bai, Chun-An Chu, Chih-Yu Chung, and Ming-Bo Lin, “PIR-sensor-based lighting device with ultra-low standby power consumption,” IEEE Transactions on Consumer Electronics, Vol. 57, No. 3, pp. 1157-1164, August 2011.
[8] Cheng-Hung Tsai, Ying-Wen Bai,Chun-An Chu, Chih-Yu Chung, and Ming-Bo Lin, “Design and implementation of a socket with zero standby power using a photovoltaic array,” IEEE Transactions on Consumers Electronics, Vol. 56, No. 4, pp. 2686-2693, Nov. 2010.
[9] Ming-Bo Lin and Yung-Yi Chang, “A new architecture of a two-stage lossless data compression and decompression algorithm,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 17, No. 9, pp. 1297-1303, Sept. 2009.
[10] Cheng-Hung Tsai, Ying-Wen Bai, Hao-Yuan Wang and Ming-Bo Lin, “Design and Implementation of a Socket with Low Standby Power,” IEEE Transactions on Consumers Electronics, Vol. 55, No. 3, pp. 1558-1565, Aug. 2009.
[11] Chia-Hung Lien, Ying-Wen Bai, and Ming-Bo Lin, “Estimation by software for the power consumption of streaming media servers,” IEEE Trans. on Instrumentation and Measurement, Vol. 56, No. 3, pp. 1859-1870, Oct. 2007.
[12] Hung-Kuang Chen, Chin-Shyurng Fahn, and Ming-Bo Lin, “Storage Independent Simplification of Polygonal Meshes,” Lecture Notes in Computer Science 4563, ISBN: 978-3-540-73334-8, pp. 3–12, 2007.
[13] Chia-Hung Lien, Ying-Wen Bai, and Ming-Bo Lin, “Remote-controllable power outlet system for home power management,” IEEE Transactions on Consumers Electronics, Vol. 53, No. 4, pp. 1634-1641, Nov. 2007.
[14] Ming-Bo Lin, Jang-Feng Lee, and Gene Eu Jan, “A lossless data compression and decompression algorithm and its hardware architecture,” IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Vol. 14, No. 9, pp. 925-936, 2006.
[15] Hung-Kuang Chen, Chin-Shyurng Fahn, Jeffrey J. P. Tsai and Ming-Bo Lin, “A novel cache-based approach to large polygonal mesh simplification,” Journal of Information Science and Engineering, Vol. 22, No. 4, pp. 843-861, 2006.
[16] Hung-Kuang Chen, Chin-Shyurng Fahn, Jeffrey J. P. Tsai, Rong-Ming Chen, and Ming-Bo Lin, “Generating high quality discrete LOD meshes for 3D computer games in linear time,” ACM Multimedia Systems, Vol. 11, No. 5, pp. 480-494, 2006.
[17] Gene Eu Jan and Ming-Bo Lin, “Concentration, load balancing, partial permutation routing, and superconcentration on cube-connected-cycles parallel computers,” Journal of Parallel and Distributed Computing, Vol. 65, No. 12, pp. 1471-1482, September 2005.
[18] Gene Eu Jan, Yuan-Shin Hwang, Ming-Bo Lin, and Deron Liang, “Novel Hierarchical Interconnection Networks for High-Performance Multicomputer Systems,” Journal of Information Science and Engineering, Vol. 20, No. 6, pp. 693-712, November 2004.
[19] Ming-Bo Lin and Jiann-Cherng Chang, "On the design of a RSA encryption/decryption chip based on a two-adder structure," Journal of the Chinese Institute of Electrical Engineering, Vol. 9, No. 3, pp. 269-277, August 2002.
[20] Gene Eu Jan, Frank Yeong-Sung Lin, Ming-Bo Lin, and Deron Liang, "Concentrations, load balancing, multicasting and partial permutation routing on hypercube parallel computers," Journal of Information Science and Engineering, Vol. 18, No. 5, pp. 693-712, September 2002.
[21] Ming-Bo Lin and Jang-Feng Lee, "On the design of a multilevel data lossless compression chip," Journal of Technology, Vol. 16, No. 2, pp. 183-190, June 2001.
[22] Ming-Bo Lin, "A uniform VLSI architecture for modulo n adder/subtracter and multiplier," Journal of the Chinese Institute of Electrical Engineering, vol. 8, no. 1, pp. 9-21, February 2001
[23] Ming-Bo Lin, "On the design of fast large fan-in CMOS multiplexers," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 8, pp. 963-967, August, 2000.
[24] Ming-Bo Lin, "New path history management circuits for Viterbi decoders," IEEE Transactions on Communications, Vol. 48, No. 10, pp. 1605-1608, October 2000.
[25] Ming-Bo Lin, "Permutation-network-based optoelectronic path-history units for Viterbi decoders," Applied Optics, Vol. 39, No., 26, pp. 4829-4833, September, 2000.
[26] Ming-Bo Lin, "A hardware architecture for the LZW data compression and decompression algorithms based ob parallel dictionaries," Journal of VLSI Signal Processing, Vol. 26, No. 3, pp. 369-381, November 2000.
[27] Ming-Bo Lin, Ming-Hong Bai, and Gene-Eu Jan, "Spanning trees for binary directed de Bruijn networks and their applications to load balancing," Journal of Marine Science and Technology, Vol. 7, No. 2, pp. 117-124, 1999.
[28] Ming-Bo Lin and Gene-Eu Jan, "Routing and broadcasting algorithms for the root-folded Petersen networks," Journal of Marine Science and Technology, Vol. 6, No. 1, pp. 65-70, 1998. (NSC 85-2213-E-011-044)
[29] Ming-Bo Lin and A. Yavuz Oruc, "The design of an optoelectronic arithmetic processor based-on permutation networks," IEEE Transactions on Computers, vol. 46, No. 2, pp. 142-153, February 1997. (NSC 84-2215-E-011-002)
[30] Gene Eu Jan, Ming-Bo Lin, and Yung-Yuan Chen, "Computerized shortest path searching for vessels," Journal of Marine Science and Technology, Vol. 5, No. 1, pp. 95-99, 1997.
[31] Ming-Bo Lin and A. Yavuz Oruc, "A fault-tolerant permutation network modulo arithmetic processor," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 2, no. 3, pp. 312-319, September 1994.
[32] Ming-Bo Lin and A. Yavuz Oruc, "Constant time inner product and matrix computations on permutation network processors," IEEE Transactions on Computers, vol. 43, no. 12, pp. 1429-1434, December 1994.
Conference
[1] Cheng-Hung Tsai, Ying-Wen Bai, Po-Chen Chen, Roger Jia Rong Jhang, and Ming-Bo Lin, " Reduction of the Standby Power Consumption of an Automatic Door System, " 2016 IEEE International Conference on Consumer Electronics (ICCE), Las Vegas, January 7-11, 2016, pp. 583-584.
[2] Shao-Hua Chen_ and Ming-Bo Lin, "An all-digital, cyclic and synthesizable TDC in the ADPLL-based clocking digital systems for multidomain power management," 2014 the 3rd International Conference on Advanced Materials Design and Mechanics (ICAMDM2014), Singapore, May 23-24, 2014.
[3] Cheng-Hung Tsai, Ying-Wen Bai, Ming-Bo Lin, Chih-Yu Chung, and Roger Jia Rong Jhang, “Design and Implementation of a PIR luminaire with zero standby power using a photovoltaic array," 2013 IEEE International Conference on Consumer Electronics (ICCE), Las Vegas, NV, January 11-14, 2013, pp. 177-178.
[4] Cheng-Hung Tsai, Ying-Wen Bai, Chih-Yu Chung, Roger Jia Rong Jhang and Ming-Bo Lin, “Using an ultrasound module to reduce the standby power consumption of a PC monitor,” 2013 IEEE International Instrumentation and Measurement Technology Conference (I2MTC), Minneapolis, MN, USA, May 06-09, 2013, pp. 717-722.
[5] Cheng-Hung Tsai, Ying-Wen Bai, Ming-Bo Lin, Roger Jia Rong Jhang, and Yen-Wen Lin, “Design and implementation of an auto flushing device with ultra-low standby power”, 2013 IEEE 17th International Symposium on Consumer Electronics, Hsinchu, Taiwan, June 3-6, 2013, pp. 183-184.
[6] Shao-Hua Chen, Yi-Sheng Lin, and Ming-Bo Lin, "A NoC-based sparse matrix multiplication system,” Workshop on Computer Systems of 2013 National Computer Symposium (NCS 2013), Tai-Chung, December 13-14, 2013, pp. CS-13-CS-18.
[7] Mehrdad Fallahpour, Chang-Hong Lin, Ming-Bo Lin, and Chin-Yu Chang, “Parallel One- and Two-Dimensional FFTs on GPGPUs”, 2012 IEEE International Conference on Anti-Counterfeiting Security and Identification (IEEE ASID2012), Taipei, Aug 24-26, 2012, pp. 316-320.
[8] Cheng-Hung Tsai, Ying-Wen Bai, Li-Chia Cheng , Kung-Shen Lin , Roger Jia Rong Jhang, and Ming-Bo Lin, “Reducing the standby power consumption of a PC monitor," 2012 The 1st IEEE Global Conference on Consumer Electronics (IEEE GCCE2012), Tokyo, Japan, Oct. 2-5, 2012, pp. 520-524.
[9] Cheng-Hung Tsai, Ying-Wen Bai, Chun-An Chu, Chih-Yu Chung and Ming-Bo Lin, “PIR-sensor-based Lighting Device with Ultra-low Standby Power Consumption”, 2011 IEEE International Instrumentation and Measurement Technology Conference (IMTC2011), Binjiang, Hangzhou, China, May 10-12, 2011, pp. 1524-1529.
[10] Cheng-Hung Tsai, Ying-Wen Bai, Chun-An Chu and Ming-Bo Lin, “Design and Implementation of a Socket with Ultra-Low Standby Power”, 2011 IEEE International Instrumentation and Measurement Technology Conference (IMTC2011), Binjiang, Hangzhou, China, May 10-12, 2011, pp. 1216-1221.
[11] Cheng-Hung Tsai, Ying-Wen Bai, Hao-Yuan Wang, and Ming-Bo Lin, “Design and implementation of a socket with low stability power,” The 13th IEEE International Symposium on Consumer Electronics (ISCE2009), Mielparque-Kyoto, Kyoto, Japan, May 25-28, 2009, pp.119-123.
[12] Ming-Bo Lin, Ing-Jang Tzeng, Ming-Chun Hsieh, " A VLSI architecture for AES with CBC mode, " Workshop on Computer Architectures, Embedded Systems, and VLSI/EDA of 2009 National Computer Symposium (NCS 2009), Taipei, November 27-28, 2009, Volume CEV2-05, pp.1-12.
[13] Cheng-Hung Tsai, Ying-Wen Bai, Ming-Bo Lin, and Yung-Sen Cheng, “Measurement and modelling for the transition penalty and the effective sleep time interval for the dynamic power measurement of PCS,” Proceedings of the 27th IASTED International Conference on Modeling, Identification, and Control, February 11-13, 2008, pp. 66-71.
[14] Chia-Hung Lien, Hsien-Chung Chen, Ying-Wen Bai and Ming-Bo Lin, “Power Monitoring and Control for Electric Home Appliances Based on Power Line Communication,” Proceedings of the 2008 IEEE International Instrumentation & Measurement Technology Conference (IMTC2008), Victoria, British Columbia, Canada, 12-15 May, 2008, pp. 2179-2184.
[15] Chia-Hung Lien, Po-Tsun Chen, Ying-Wen Bai and Ming-Bo Lin, “Monitoring System with Moving Object Detection Based on MSN Messenger,” Proceedings of the 2008 IEEE International Instrumentation & Measurement Technology Conference (IMTC2008), Victoria, British Columbia, Canada, 12-15 May, 2008, pp. 229-234.
[16] Chia-Hung Lien, Jen-Chieh Lin, Ying-Wen Bai and Ming-Bo Lin, “Design of a UPS Outlet System Controlled by PDAs and GSM Cellular Phones,” 2008 IEEE International Symposium on Industrial Electronics (ISIE2008), University of Cambridge, Cambridge, UK, 30 June-2 July, 2008, pp.1814-1819.
[17] Hung-Kuang Chen, Chin-Shyurng Fahn, and Ming-Bo Lin, “Storage Independent Simplification of Polygonal Meshes,” R. Shumaker (Ed.): Virtual Reality, HCII 2007, Beijing, P.R. China, 22-27 July 2007.
[18] Chia-Hung Lien, Ming-Fong Liu, Ying-Wen Bai, Chi-Hsiung Lin, and Ming-Bo Lin, “Measurement by the Software Design for the Power Consumption of Streaming Media Servers”, 2006 IEEE Instrumentation and Measurement Technology Conference, Italy, 24-27 April 2006, pp.1597-1602.
[19] Chia-Hung Lien, Ying-Wen Bai, and Ming-Bo Lin, “Web Server Power Estimation, Modeling and Management”, IEEE International Conference on Networks (IEEE-ICON2006), Singapore, Sept. 13-15, 2006, pp. 541-546.
[20] Chia-Hung Lien, Chi-Hsiung Lin, Ying-Wen Bai, Ming-Fong Liu, and Ming-Bo Lin, “Remotely Controllable Outlet System for Home Power Management”, 2006 IEEE Tenth International Symposium on Consumer Electronics (ISCE 2006), 28 Jun- 1 July 2006, St. Petersburg, Russia, pp. 7-12.
[21] Chi-Yu Wu, Shanq-fang Ruan, Chung-Kai Cheng, and Ming-Bo Lin, "A new block-xor precomputation-based CAM design for low-power embedded system,” 2006, The 12th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), 11-14 Dec. 2005, Gammarth, pp. 1-4.
[22] Hung-Kuang Chen; Chin-Shyurng Fahn; Tsai, J.J.P.; Rong-Ming Chen; Ming-Bo Lin, “A linear time algorithm for high quality mesh simplification,” Proceedings of the Sixth IEEE International Symposium on Multimedia Software Engineering, 13-15 Dec., 2004, Miami, Florida, pp. 169-176.
[23] Chia-Hung Lien, Ying-Wen Bai, Ming-Bo Lin, and Po-An Chen, “The Saving of Energy in Web Server Clusters by Utilizing Dynamic Server Management”, Singapore, 16-19 Nov., 2004, The 12th IEEE International Conference on Networks (ICON 2004), pp. 253-257.
[24] Chia-Hung Lien, Ying-Wen Bai, and Ming-Bo Lin, “Modeling power consumption and saving potential of a scalable multi-server architecture,” Proceedings of the IASTED International Conference Applied Informatics, February 18-21, 2002, Innsbruck, Austria, pp. 370-377.
[25] Gene Eu Jan, and Ming-Bo Lin, “The design and analysis of a RSA encryption/decryption system" Proceedings of 2001 Fall Workshop on Information Theory and Communications, Woo Lai, Taipei, Taiwan, pp.???-???.
[26] Ming-Bo Lin and Jenn-Shan Tsay, "An 8-bit CMOS video digital-to-analog converter," Proceedings of the 11th VLSI Design/CAD Symposium, August 16-19, 2000, Peitung, Taiwan, pp.353-356. (NSC 87-2215-E-011-005)
[27] Ming-Bo Lin and Jang-Feng Lee, "A new lossless data compression architecture based on combining PDLZW with adaptive Huffman algorithms," Proceedings of the 11th VLSI Design/CAD Symposium, August 16-19, 2000, Peitung, Taiwan, pp. 61-64.
[28] Gene Eu Jan, Ming-Bo Lin, Albert Chao, and Deron Liang, "A constant queue partial permutation routing algorithm for cube-connected-cycles multicomputer systems," Proceedings of the 2000 ICPADS workshop, July 4-7, 2000, Japan, pp.35-40.
[29] Gene Eu Jan, Shiaw-Jyi Shieh, S. W. Leu, and Ming-Bo Lin, "A fast self-routing multicasting algorithm in hypercubes," Proceedings of 2000 Workshop on Distributed System Technologies and Applications, May 13-14, 2000, Tainan, Taiwan, pp. 67-75.
[30] Gene-Eu Jan, Albert Chao, S. W. Leu, and Ming-Bo Lin, "A fast self-routing connection algorithm in hypercubes," Proceedings of 1999 Workshop on Distributed System Technologies and Applicationss, May 13-14, 1999, Tainan, Taiwan, pp. 265-275.
[31] Ming-Bo Lin, "On the design of fast CMOS multiplexers," Proceedings of the 10th VLSI Design/CAD Symposium, August 18-21, 1999, Taiwan, pp. 285-288. (NSC 87-2215-E-011-005)
[32] Ming-Bo Lin, Shi-Bin Uen, and Gene-Eu Jan, "An 8-bit CMOS pipelined analog-to-digital converter," Proceedings of the 10th VLSI Design/CAD Symposium, August 18-21, 1999, Taiwan, pp. 289-292. (NSC 87-2215-E-011-005)
[33] Ming-Bo Lin and Jiun-Woei Chen, "A multilevel hardware architecture for lossless data compression applications," Proceedings of 1999 National Computer Symposium, December 20-21, 1999, Taiwan, pp. 289-292.
[34] Gene Eu Jan, I. Y. Lin, Ming-Bo Lin, and Yean Chich Jiang, "Scalable interconnection networks based on generalized Petersen graph," Proceedings of 1998 Workshop on Distributed System Technologies and Applicationss, May 14-15, 1998, Tainan, Taiwan, pp.485-491.
[35] Ming-Bo Lin and Yung-Sen Chen, "A VLSI chip design for the PDLZW data compression algorithm," Proceedings of the 9th VLSI Design/CAD Symposium, August 20-22, 1998, Taiwan, pp. 289-292.
[36] Ming-Bo Lin and Horng-Sheng Chen, "The design of a Viterbi decoder chip by using permutation-network-based trace-back circuit," Proceedings of the 9th VLSI Design/CAD Symposium, August 20-22, 1998, Taiwan, pp. 443-446.
[37] Ming-Bo Lin, "A parallel VLSI architecture for the LZW data compression algorithm," International Symposium on VLSI Technology, Systems, and Applications, June 3-5, 1997, Taiwan, pp. 98-101.
[38] Gene Eu Jan, Ming-Bo Lin, and Yung-Yuan Chen, "A novel design of superconcentrator-based load balancer for highly parallel computers," Proceedings of 1997 Workshop on Distributed System Technologies and Applications, May 15-16, 1997, Tainan, Taiwan, pp. 589-596.
[39] Ming-Bo Lin and Yung-Sen Chen, "A priority-output CAM for the PDLZW data compression algorithm," Proceedings of the 8th VLSI Design/CAD Symposium, August 21-23, 1997, Taiwan, pp. 341-344 .
[40] Ming-Bo Lin, Shi-Bin Uen, and Jenn-Shan Tsay, "An 8-b 10MHz CMOS digital-to-analog converter with 75Ω||20p load," Proceedings of the 8th VLSI Design/CAD Symposium, August 21-23, 1997, Taiwan, pp. 201-204. (NSC 87-2215-E-011-005)
[41] Ming-Bo Lin and Ming-Hong Bai, "Broadcast algorithms for binary directed de Bruijn networks," Proceedings of the 1997 National Computer Symposium, December 22-23, 1997, Taiwan, pp. E-18-23.
[42] Gene Eu Jan, Ming-Bo Lin, and Yean-Jyh Jiang, "Scalable interconnection networks based on Heawood graph," Proceedings of the 1997 National Computer Symposium, December 22-23, 1997, Taiwan, pp. E-1-6.
[43] Ming-Bo Lin and Ing-Yuan Tarng, "A design for high-speed residue digital-to-analog converters," Proceedings of the 7th VLSI Design/CAD Symposium, August 15-17, 1996, Taiwan, pp. 312-315.
[44] Gene Eu Jan and Ming-Bo Lin, "Effective load balancing on highly parallel multicomputers based on superconcentrators," Proceedings of 1994 International Conference on Parallel and Distributed Systems, December 19-21, 1994, Hshin-Chu, Taiwan, pp. 216-221.
[45] Ming-Bo Lin and A. Yavuz Oruc, "A fault-tolerant permutation-network-based modulo arithmetic processors," Proceedings of the 1993 International Symposium on VLSI, Technology, Systems, and Applications, May 12-14, 1993, Taipei, Taiwan, pp. 204-208.
[46] Ming-Bo Lin and A. Yavuz Oruc, "Constant time inner product and matrix computations on permutation-network-based processors," Proceedings of 1992 International Conference on Parallel and Distributed Systems, December 16-18, 1992, Hshin-Chu, Taiwan, pp. 441-448.
Patent
Book
[1] Ming-Bo Lin, An Introduction to Cortex-M0-Based Embedded Systems --- Cortex-M0 Assembly Language Programming, CreateSpace Independent Publishing Platform, 2019. (ISBN: 978-1721530885)
[2] Ming-Bo Lin, An Introduction to Cortex-M3-Based Embedded Systems --- Cortex-M3 Assembly Language Programming, CreateSpace Independent Publishing Platform, 2019. (ISBN: 978-1721530946)
[3] Ming-Bo Lin, An Introduction to Cortex-M4-Based Embedded Systems --- TM4C123 Microcontroller Principles and Applications, CreateSpace Independent Publishing Platform, 2019. (ISBN: 978-1721530984
[4] Ming-Bo Lin, Microprocessor Principles and Applications: x86/x64 Family Soft- ware, Hardware, Interfacing, and Systems, 6th ed., Taipei, Taiwan: Chuan Hwa Book Ltd., 2018. (ISBN: 978-986-4637713)
[5] Ming-Bo Lin, Digital Logic Principles, Taiwan: Chuan Hwa Book Ltd., 2018. (ISBN: 978-986-4638895)
[6] Ming-Bo Lin, An Entry-Level Tutorial on FPGA-Based System Design Using Verilog HDL: Intel/Altera Quartus Version, Taipei, Taiwan: Chuan Hwa Book Ltd., 2013. (ISBN: 978-986-4638901)
[7] Ming-Bo Lin, FPGA-Based Systems Design and Practice---Part I: RTL Design and Prototyping in Verilog HDL, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530199)
[8] Ming-Bo Lin, FPGA-Based Systems Design and Practice---Part II: System Design, Synthesis, and Verification, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530106)
[9] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Intel/Altera Quartus Version---Part I: An Entry-Level Tutorial, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530380)
[10] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Intel/Altera Quartus Version---Part II: ASM Charts and RTL Design, vCreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530571)
[11] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Intel/Altera Quartus Version---Part III: A Clock/Timer and a Simple Computer, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530496)
[12] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Xilinx ISE Version---Part I: An Entry-Level Tutorial, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530441)
[13] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Xilinx ISE Version---Part II: ASM Charts and RTL Design, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530809)
[14] Ming-Bo Lin, A Tutorial on FPGA-Based System Design Using Verilog HDL: Xilinx ISE Version---Part III: A Clock/Timer and a Simple Computer, CreateSpace Independent Publishing Platform, 2018. (ISBN: 978-1721530830)
[15] Ming-Bo Lin, Digital System Design: Principles, Practices, and Applications, 5th ed., Taipei, Taiwan: Chuan Hwa Book Ltd., 2017. (ISBN: 978-986-4635955)
[16] Ming-Bo Lin, Digital Logic Design—With an Introduction to Verilog HDL, 6th ed., Taipei, Taiwan: Chuan Hwa Book Ltd., 2017. (ISBN: 978-986-4635948)
[17] Ming-Bo Lin, An Introduction to Verilog HDL, CreateSpace Independent Publishing Platform, 2016. (ISBN-13: 978-1523320974) (Amazon Printede Book)
[18] Ming-Bo Lin, FPGA Systems Design and Practice: Design, Synthesis, Verification, and Prototyping in Verilog HDL, CreateSpace Independent Publishing Platform, 2016. (ISBN-13: 978-1530110124) (Amazon Printede Book)
[19] Ming-Bo Lin, Principles and Applications of Microcomputers: 8051 Microcontroller Software, Hardware, and Interfacing, CreateSpace Independent Publishing Platform, 2016. (ISBN: 978-1537158372)
[20] Ming-Bo Lin, Principles and Applications of Microcomputers: 8051 Microcontroller Software, Hardware, and Interfacing, Vol.~I: 8051 Assembly-Language Programming, CreateSpace Independent Publishing Platform, 2016. (ISBN: 978-1537158402)
[21] Ming-Bo Lin, Principles and Applications of Microcomputers: 8051 Microcontroller Software, Hardware, and Interfacing, Vol.~II: 8051 Microcontroller Hardware and Interfacing, CreateSpace Independent Publishing Platform, 2016. (ISBN: 978-1537158426)
[22] Ming-Bo Lin, Digital Logic Design: With An Introduction to Verilog HDL, CreateSpace Independent Publishing Platform, 2016. (ISBN: 978-1537158365)
[23] Ming-Bo Lin, Digital System Designs and Practices: Using Verilog HDL and FPGAs, 2nd ed., CreateSpace Independent Publishing Platform, 2015. (ISBN: 9781514313305) (Amazon Printed Book and eBook)
[24] 林銘波,數位邏輯設計---使用Verilog HDL,第五版 台北:全華圖書公司,2014。(Ming-Bo Lin, Digital Logic Design ---Using Verilog HDL, 5th ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2014) (ISBN: 978-957-21- 9697-7)
[25] 林銘波與林姝廷,微算機基本原理與應用-MCS-51嵌入式微算機系統軟體與硬體,第三版,台北:全華科技圖書公司,2013。(Ming-Bo Lin and Shu-Tyng Lin, Basic Principles and Applications of Microprocessors: MCS-51 Embedded Microcomputer System, Software, and Hardware, 3rd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2013.) (ISBN: 978-957-21-9175-0)
[26] 林銘波與林姝廷,8051微算機原理與應用,台北:全華科技圖書公司,2012。(Ming-Bo Lin and Shu-Tyng Lin, 8051 Microcomputer Principles and Applications, Chuan Hwa Book Ltd., (Taipei, Taiwan), 2012.) (ISBN: 978-957-21-8375-5)
[27] 林銘波,微算機原理與應用-x86/x64軟體、硬體、界面、與系統,第五版,台北:全華科技圖書公司,2012。(Ming-Bo Lin, Microprocessor Principles and Applications: x86/x64 Family Software, Hardware, Interfacing, and Systems, 5th ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2012.) (ISBN: 978-957-21- 8682-4)
[28] Ming-Bo Lin, Introduction to VLSI Systems: A Logic, Circuit, and System Design Perspective, CRC Press, 2012. (ISBN: 978-1-439-86859-1) (Translated unto Simplified Chinese 2015)
[29] 林銘波,數位邏輯設計,第四版 台北:全華圖書公司,2011。(Ming-Bo Lin, Digital Logic Design, 4th ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2011) (ISBN: 978-957-21- 8184-3)
[30] 林銘波,數位系統設計:原理、實務與應用,第四版,台北:全華圖書公司,2010。(Ming-Bo Lin, Digital System Design: Principles, Practices, and Applications, 4th ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2010.) (ISBN: 978-957-21-7920-8)
[31] 林銘波,數位邏輯設計,第三版 台北:全華圖書公司,2009。(Ming-Bo Lin, Digital Logic Design, 3rd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2008) (ISBN: 978-957-21-6394-8)
[32] 林銘波,微算機基本原理與應用-MCS-51嵌入式微算機系統軟體與硬體,第二版,台北:全華科技圖書公司,2008。(Ming-Bo Lin, Basic Principles and Applications of Microprocessors: MCS-51 Embedded Microcomputer System, Software, and Hardware, 2nd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2003.) (ISBN: 978-957-21-6199-9)
[33] Ming-Bo Lin, Digital System Designs and Practices: Using Verilog HDL and FPGAs, John Wiley & Sons, 2008. (ISBN: 0-470-823232/978-0-470-82323-1)
[34] 林銘波,微算機原理與應用-80x86/Pentium軟體、硬體、界面、與系統,第四版,台北:全華科技圖書公司,2003。(Ming-Bo Lin, Microprocessor Principles and Applications: 80x86/Pentium Family Software, Hardware, Interfacing, and Systems, 4th ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2003.) (ISBN: 957-21-4145-7)
[35] 林銘波,微算機基本原理與應用-MCS-51嵌入式微算機系統軟體與硬體,台北:全華科技圖書公司,2003。(Ming-Bo Lin, Basic Principles and Applications of Microprocessors: MCS-51 Embedded Microcomputer System, Software, and Hardware, Chuan Hwa Book Ltd., (Taipei, Taiwan), 2003.) (ISBN: 957-21-4227-5)
[36] 林銘波,數位邏輯設計,第二版,台北:全華圖書公司,2003。(Ming-Bo Lin, Digital Logic Design, 2nd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2003) ISBN: 978-957-21-4231-8)
[37] 林銘波,數位系統設計:原理、實務、ASIC實現,第三版,台北:全華科技圖書公司,2002。(Ming-Bo Lin, Digital System Design: Principles, Practices, and ASIC Realization, 3rd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 2002.) (ISBN: 957-21-3710-7)
[38] 林銘波,數位邏輯設計,台北:全華科技圖書公司,2002。(Ming-Bo Lin, Digital Logic Design, Chuan Hwa Book Ltd., (Taipei, Taiwan), 2002) (ISBN: 957-21-3835-9)
[39] 林銘波,微算機基本原理與應用-MCS-51族系軟體、硬體、界面、與應用,台北:全華科技圖書公司,2001。(Ming-Bo Lin, Basic Principles and Applications of Microprocessors: MCS-51 Software, Hardware, Interfacing, and Applications, Chuan Hwa Book Ltd., (Taipei, Taiwan), 2001.) (ISBN: 957-21-3346-2)
[40] 林銘波,微算機原理與應用-80x86/Pentium軟體、硬體、界面、與系統,台北:全華科技圖書公司,1998。(Ming-Bo Lin, Microprocessor Principles and Applications: 80x86/Pentium Family Software, Hardware, Interfacing, and Systems, 3rd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 1998.) (ISBN: 957-21-2163-4)
[41] 林銘波,組合語言與程式設計,第二版, 台北:全華科技圖書公司,1996。(Ming-Bo Lin, Assembly Language Programming, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1997.) (ISBN: 957-21-1768-8)
[42] 林銘波,數位系統設計,第二版,台北:全華科技圖書公司,1996。(Ming-Bo Lin, Digital System Design, 2nd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 1996.) (ISBN: 957-21-1519-7)
[43] 林銘波,組合語言與程式設計,台北:全華科技圖書公司,1996。(Ming-Bo Lin, Assembly Language Programming, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1996.) (ISBN: 957-21-1648-7)
[44] 林銘波,微算機原理-80x86軟體、硬體、與界面,台北:全華科技圖書公司,1994。(Ming-Bo Lin, Microprocessor Principles: 80x86 Family Software, Hardware, and Interfacing, 2nd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 1994.) (ISBN: 957-21-0635-X)
[45] 林銘波,數位系統設計, 台北:全華科技圖書公司,1989。(Ming-Bo Lin, Digital System Design, 2nd ed., Chuan Hwa Book Ltd., (Taipei, Taiwan), 1989.)
[46] 林銘波,微算機原理與應用(下),台北:全華科技圖書公司,1988。(Ming-Bo Lin, Microprocessor Principles and Applications, Vol. 2, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1988.)
[47] 林銘波,微算機原理與應用(上),台北:全華科技圖書公司,1987。(Ming-Bo Lin, Microprocessor Principles and Applications, Vol. 1, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1987.)
[48] 林錦坤、林銘波,微處理機、微算機原理與應用:III—8位元微算機系統,台北:全華科技圖書公司,1984。(Jiin-Kuen Lin and Ming-Bo Lin, Microprocessor, Microcomputers Principles and Applications, Vol. 3: 8-Bit Microcomputer Systems, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1984.)
[49] 林錦坤、林銘波,微處理機、微算機原理與應用:I—計算機基本原理,台北:全華科技圖書公司,1984。(Jiin-Kuen Lin and Ming-Bo Lin, Microprocessor, Microcomputers Principles and Applications, Vol. 1: Microcomputer Basic Principles, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1984.)
[50] 林錦坤、林銘波,微處理機、微算機原理與應用:II—計算機系統結構,台北:全華科技圖書公司,1984。(Jiin-Kuen Lin and Ming-Bo Lin, Microprocessor, Microcomputers Principles and Applications, Vol. 2: Computer System Architecture, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1984.)
[51] 林錦坤、林銘波,微處理機、微算機原理與應用:IV—16位元微算機系統,台北:全華科技圖書公司,1984。(Jiin-Kuen Lin and Ming-Bo Lin, Microprocessor, Microcomputers Principles and Applications, Vol. 4: 16-Bit Microcomputer Systems, Chuan Hwa Book Ltd., (Taipei, Taiwan), 1984.)
[52] 林銘波譯,IC定時器手冊,台北:全華科技圖書公司,1990。(Ming-Bo Lin, translated from Walter G. Jung, IC Timer Cookbook, 2 nd ed., Howard W. Sams & Co., Inc., 1983.)
[53] 林銘波譯,IBM PC/XT遊戲聲音繪圖,台北:波前圖書公司,1986。(Ming-Bo Lin, translated from by Dorothy Strickland, games, Graphics and Sounds for the IBM PC published by R.J. Brady, 1983)
Other

Project
Title Total Amount Excution Duration Client
USB OTG晶片設計與USB播放系統設計與實作(I)(nsc: 95-2221-E011-049) 603,000 95 - 96 國科會
嵌入式系統硬體平台開發與整體發展環境設計(nsc: 93-2213-E011-048 ) 522,600 93 - 94 國科會
嵌入式系統硬體平台開發與整體發展環境設計(I)(nsc:92-2213-E011-062) 472,000 92 - 93 國科會
『超大型積體電路與系統設計教育改進計畫』92年度課程推廣計畫 1,937,500 92 - 92 教育部
IEEE 1394連結層控制器IP設計(nsc: 90-2213-E011-075 ) 544,300 90 - 91 國科會

Student
Ph.D
104
具可合成架構之全數位循環式時間至數位轉換器 (A synthesizer architecture of all-digital cyclic time-to-digital converters)
陳少華 (Shao-Hua Chen)
103
家電低待機功耗之降低機制研究與實現 (Design and Implementation of the Mechanism to Reduce the Standby Power Consumption for Home Appliances)
蔡政鴻 (Cheng-Hung Tsai)
97
伺服器耗能估測分析與遠端可控制型家庭電源管理之研究 (A Study of Estimation for the Power Consumption of Service and Remote-Controllable Home Power Management, January 2008)
連嘉宏 (Chia-Hung Lien)
95
三維物件的高效能大型多邊形網格化簡方法之研究 (A Study on the High-Performance Approaches to Large Polygonal Mesh Simplification of 3D Objects, January 2006)
陳宏光 (Hung-Kuang Chen)
89
多邊形交換網路之對稱可程式多晶片模組 (Polygonal Switching Network for Symmetric Programmable Multi-Chip Module, November 2000)
嚴茂旭 (Mao-Hsu Yen)
M.S
108
The design and implementation of an AES processor architecture
白騏睿
108
The design and implementation of an AXI4-compatible DDR4-SDRAM controller
洪銘冠
108
Design and implementation of an IP compatible with the ARM Cortex-M3 ISA
蘇子暢
107
The design and implementation of an AXI4-interface-based DDR4-SDRAM controller
張耿華
107
The design and implementation of a DDR4-SDRAM controller based on AHB5 interface
鄭宇良
107
Design and implementation of a USB 3.1 Gen 2 Physical layer
黃朗
107
Thed esign and implementation of an AXI3-interface-based DDR4-SDRAM controller
徐國倫
106
The Design and Implementation of an FPGA Buck Converter Based on DPWM
陳威儒
105
The design of a low standby power consumption embedded system and its application in remotely controlled automatic door system
Roger Jia Rong Jhang
104
The Design of a NoC-Based Fast Fourier Transform System
De-Sheng Lin
102
The design and verification of a 32-bit multithreading CPU architecture
黃之鴻
102
The design and realization of a digital DC-to-DC converter with three-level voltage output
Wei-Lun Hunag
101
The Design of a NoC-Based Sparse Matrix Multiplication System
Yi-sheng Lin
101
Global Illumination Rendering on a Mesh-Noc-Based MPSoC
Mehrdad Fallahpour
100
The Design and Verification of a Low-Power Data Cache Architecture for 32-Bit Embedded Microprocessors, 2011
陳聖文
100
The Design and Verification of a Switch Architecture for Network-on-Chip, 2011
李瑾文
100
Design of a Low-Power High-Performance Two’s Complement Generator with Small Area, 2011
張善婷
99
An all digital phase-locked loop with a jitter measurement built-in self-test circuit
李昭憲
99
(Low-cost design of optional key AES chip, 2010)
謝名峻
99
(The design and verification of high-speed redundant Booth multiplier, 2010)
袁民倫
98
The design and verification of an ARMv4T instruction set architecture compatible microprocessor IP
方志中
98
An Adaptive Error Concealment Scheme for H.264 Video Transmission
吳俊才
98
The design and verification of an ARM compatible dynamic memory controller IP
黃文詮
98
The design and verification of a low-power instruction cache architecture for 32-bit embedded microprocessors
黃逸杰
96
資料壓縮/解壓縮智財架構設計與驗證
張勇毅
96
AMBA 2.0相容之匯流排控制器智財設計與驗證
詹勝翔
96
ARM922T架構相容之系統協同處理器智財設計與驗證
蘇侯斌
96
ARM922T架構相容之快取記憶體系統智財設計與驗證
王偉臣
96
ARMv4指令集架構相容之記憶體管理單元智財設計與驗證
徐昌陽
96
全數位式鎖相迴路智財設計與驗證
鄭仲凱
95
ARM9DMI微處理器智財設計與驗證
張育賓
95
具CAN界面之通用型微控制器IP設計與驗證
李總
95
可配置性USB功能核心IP設計與驗證
周耕緯
94
ARMM v4指令集架構相容之微處理器智財設計與驗證
林晉禾
94
求最長共同子序列之硬體架構IP設計與驗證
陳翊萱
93
可調式橢圓曲線加解密智產設計與驗證
曹睿彰
93
AES內建CBC模式加密與解密智產設計與驗證
曾英彰
93
具可配置能力之8位元微處理器智產產生器設計與驗證
施宏霖
93
多階式資料壓縮/解壓縮智產架構設計與驗證
林書彥
92
6502指令集架構相容之微處理機智產設計與實現
張慈牧
91
IEEE 1394連結層的設計與實現
鄭景生
91
橢圓曲線加密與解密演算法硬體架構設計與實現
賴譽仁
91
可參數化之Viterbi解碼器Soft IP設計與實現
周淑嫻
90
排序處理器設計與製作
廖學賢
90
多階層資料壓縮晶片架構設計與製作
陳堯昌
89
非一致性曲線面晶片設計與製作
林東瑩
89
RSA加解密電路設計
張建誠
89
The design and implementation of a multilevel data compression algorithm
Jang-Feng Lee
88
CDMA之Viterbi解碼器晶片設計與製作
林昶志
88
多階層式資料壓縮晶片架構設計
陳均煒
88
多邊形現場可規劃連線晶片之積體電路設計(與藍信彰博士共同指導)
詹戊賓
88
多階層式資料壓縮晶片之繞線演算法設計(與藍信彰博士共同指導)
曹書銘
87
8位元CMOS導管式類比數位轉換器之設計與製作
溫世斌
87
8位元CMOS影像數位類比轉換器之設計與製作
蔡振衫
86
以LZW演算法為基礎的資料壓縮晶片設計與製作
陳永森
86
Viterbi解碼器晶片設計與製作
陳鴻生
86
以RSA為基礎之編密/解密器設計與研製
張明義
86
加權式中間值濾波器/排序網路設計與製作
張華享
86
無線通信網路之無線電台功率控制及頻道分配(與林永松博士共同指導)
葉呈祥
86
承載多訊務形態之ATM網路中虛擬路徑及虛擬通道之配置(與林永松博士共同指導)
魏子順
86
ATM網路上封包端至端延遲之研究(與林永松博士共同指導)
李慧蓉
86
有線電視網路設計(與林永松博士共同指導)
柯中智
85
以餘數系統為基礎之有限脈衝響應數位濾波器
唐英原
84
De Bruijn網路之路由選擇與負載平衡演算法之研究
白明弘
84
CMOS與BiCMOS類比乘法器之研究 (與劉深淵博士共同指導)
張正杰
84
CMOS線性與非線性類比積體電路之研究 (與劉深淵博士共同指導)
施忠信
83
LZW資料壓縮VLSI架構之研究
何昇龍
83
在交叉立方體上之完整適應性容錯傳遞演算法
林天生
Student's Project
100
The design and FPGA implementation of an 8-bit CPU
林鼎鈞
97
The design of a wide-word adder
黃之鴻
96
FPGA浮點運算乘法器設計與實現
許宇成
95
PLC應用電路設計
蘇士凱
91
8051 UART I^2C模組設計
謝孟江
91
8051單晶片核心設計
葉俊明
91
8051Timer 0,1,2
徐世樺
91
8051單晶片I/O埠與中斷模組設計
黃俊賢
90
低功率8051核心設計
周弘忠
90
8051核心設計與實作
林昭堂
89
8051核心設計與實作
黃韋豪
88
低功率8051核心設計
羅永志
88
低功率8051核心設計
呂孟杰
88
低功率8051核心設計
余茂鵬
87
X * Y mod 216 + 1運算電路設計
李其昌與鄭景升
87
X * Y mod 216 + 1運算電路設計
林哲民與許家偉
86
低功率8位元微控制器核心設計
劉志鵬
85
ASIC設計
蔡志宏與陳怡賢
85
使用Verilog設計ASIC
王維魯與黃智宏
83
計算機網路應用程式設計
洪明輝與廖述惟
83
計算機網路應用程式設計
余如崧與林振莆
82
FPGA應用IC設計
吳民樺與許德俊
78
電腦鼠
許先越、白文、李宜勳、陳世東
76
6805系列單晶片微算機發展工具設計
翁鴻裕、陳再發、何漢彰
76
PAL燒錄卡製作
沈錫傑、巫文成、吳伯烜、李枋壅
76
單晶片微算機發展工具設計
曹治、高建生、鐘志聰
76
Z80微處機發展工具設計
林東養、邱孟佑、黃樹林
76
Z80 CPU發展工具模擬
劉嘉榮、王效忠
76
PAL燒錄卡製作
李國良、李文昌、謝門扇
76
Z80微算機發展工具設計
游家斌、黃國益、劉榮宗
76
M1468705單晶片微算機發展工具
孫際宇、韓菊珍、謝永芳
76
單晶片微處機發展工具
薛安運、童繼中
Student's Honor