文字方塊:  Computer System Group

Professor Chen-Mie Wu

Fields of study: Hardware/Software Co-design for Embedded Systems,

Hardware/Software Systems for Computer Vision, VLSI Architecture Design

Key words: Embedded Systems, Computer Vision, SOPC, VLSI

Email: wu@et.ntust.edu.tw

Phone: 886-2-27376378(voice), 886-2-27376424(Fax)

 


1. The Subject and Aims of Research

  Major research directions include three parts: SOPC-based embedded system design, SOPC-based hardware/software Systems for Computer Vision, and Linux-based software system design. Currently, the major research topics include PTHREAD-based microkernel design, design of on-chip system bus for a SOPC-based embedded system, embedded file system, image preprocessing, image matching, and computing systems for Hough transform.

 

1.      Related Recent Research Topics

(a) Design of a SOPC-based real-time microkernel: The related researches include two major parts. The first part is related to the design of the logic layer for a PTHREAD-based real-time microkernel. In this microkernel system programs are designed according to the standard of POSIX threads. The second part is related to the design of the physical layer of the real-time microkernel. The related system architecture is shown in Fig. 1.

 

Fig. 1: the system architecture of a PTHREAD-based real-time microkernel.

 

 

(b) Design of an on-chip system bus for a SOPC-based embedded system: The related researches include three major parts. The first part is related to the design of a control protocol for the system bus. The second part is to design embedded RAM and peripheral components, and integrate them with the system bus. The third part is to design a JTAG-based testing system with BIST capability. The related system architecture is shown in Fig. 2.

 

    

Fig. 2: the architecture diagram of a SOPC-based embedded bus system.

 

3. Selected Publications and Projects

NSF Projects

Design and Implementation of a SOPC-based Real-time Microkernel and its Performance Monitor2005; A Distributed Processing System for HT-based Shape Recognition2003; Design of a Simulation Platform and VLSI Chip for SOC Researches2001